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Stack-up of a six-layer help

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Hi,

I have to design a 6 layer board with Altium Designer software.

Well, in this board I have :

-Power: 1.2V , 1.8V and 3.3 V
-GND
-Digital signals.

This board is based on a DSP with the maximum frequency of 600 MHz.


Can any one help me how to make the stack-up of my six-layers.

Well I read bofore that I'm able to use the split plane technique, is it good for my board to use this technique? also can I split 1 plane of power to three parts (1.2V; 1.8V and 3.3V)?

Waiting for your suggestions...
 

Hi!
here is my sample.
Via 0.5/0.2 [mm]
minimal line width/clearance 0.1/0.1[mm]
stackup.JPG

L1 – Signal
L2 – GND
L3 – Signal/Power
L4 – Signal/Power
L5 – GND
L6 – Signal
 

Thank you for your reply.

Well, I want to know why you have make 2 planes for GND?
Also,for my case I have 3 powers and it seems that you have only 2 powers in your sample project.So, can I change one of the GND planes by a power plane?
 

Hi!
In my case pcb is high speed (single impedanse 50ohm, differential 100ohm), and routed signals on L1,L,L6 layers must have GND plane for robust signal integrity. In my opinion in your case pcb is high speed too. In my board there are 4 different powers and i route them on one layer (L4).

I think you should try route VCCs on one plane, and have GND planes under(or above) each signal layer for robust signa integrity (especially if there are ddr or modern high speed interfaces)
 

fpga-developer,

Did you consider the crosstalk in between L3 and L4 signals?

I wonder why Intel routed PCIe signals in between these layers too...
 

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