allanvv
Advanced Member level 4
I have a layout for series resistors with instance names like:
|R1 |R2 |R3 |R4
In my schematic I have four resistors with the nets inbetween named t0, t1, t2. I have the connectivity of these nets well defined in Layout XL.
I go to Connectivity->Check->Against Source, and it says there are 0 differences. Then I go to Connectivity->Update->Components and Nets and hit OK. You'd think it wouldn't actually do anything right? Well, it changes my layout instance names to:
|R1 |R3 |R2 |R4
And the routing is no longer in series. When I manually change the names back and hit update again, it repeats this. If I try to outsmart it by making my schematic R1, R3, R2, R4, and then I hit update, my layout automatically becomes R1, R2, R3, R4 and the routing is still messed up. For some reason it's insisting on forcing the layout instances to be in this order. This even happens when I delete all net connectivity information from the layout before trying to update. Anyone knows what is going on here? Running version 6.1.4.
|R1 |R2 |R3 |R4
In my schematic I have four resistors with the nets inbetween named t0, t1, t2. I have the connectivity of these nets well defined in Layout XL.
I go to Connectivity->Check->Against Source, and it says there are 0 differences. Then I go to Connectivity->Update->Components and Nets and hit OK. You'd think it wouldn't actually do anything right? Well, it changes my layout instance names to:
|R1 |R3 |R2 |R4
And the routing is no longer in series. When I manually change the names back and hit update again, it repeats this. If I try to outsmart it by making my schematic R1, R3, R2, R4, and then I hit update, my layout automatically becomes R1, R2, R3, R4 and the routing is still messed up. For some reason it's insisting on forcing the layout instances to be in this order. This even happens when I delete all net connectivity information from the layout before trying to update. Anyone knows what is going on here? Running version 6.1.4.
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