# sine wave with different frequency using FPGA

1. ## sine wave with different frequency using FPGA

hello,
am working on a project waveform generation using fpga , i did sine wave with 1k freq(verilog, vhdl) but now i required sine wave with freq. upto 400khz plz gimmi some tips.

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2. ## Re: sine wave with different frequency using FPGA

Hi!

U want a sine wave generator, with switchable (adjustable) frequency? If this is the case, I'm doing similar project right now.
What technic do u used for sine gen? Can u post your code?

In most sine generators, they using a "base" frequency, so u will need an adjustable clock divider to supply adjustable base frequency to sine gen.

3. ## Re: sine wave with different frequency using FPGA

I would create a DDS process (Direct Digital Synthesis). There is also a DDS Compiler IP Core, if you have that. But it can be hand-coded with ease. Read:

http://en.wikipedia.org/wiki/Direct_digital_synthesizer
http://www.analog.com/library/analog...38-08/dds.html
http://www.analog.com/static/importe...rev12-2-99.pdf

Basically an accumulator input into a ROM to map phase to amplitude.

- Ryan

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4. ## Re: sine wave with different frequency using FPGA

I'm using an iteration based code, it's iterates trough the values of 1/4 of a sine wave. http://www.doulos.com/knowhow/vhdl_d...ave_generator/ - just in my case, I rewriteing the code for 0 to 3.3V output.

5. ## Re: sine wave with different frequency using FPGA

It's a very "basic", fixed frequency generator. If you want to do anything with variable frequency, you should really learn about the DDS concept mentioned by Ryan. You'll also find various previous edaboard threads related to the topic.

6. ## Re: sine wave with different frequency using FPGA

If you use Xilinx device, I would start from here: http://www.xilinx.com/products/intel...S_Compiler.htm . This IP is available in Xilinx Core Generator tool.

Originally Posted by Raviraj Sarje
hello,
am working on a project waveform generation using fpga , i did sine wave with 1k freq(verilog, vhdl) but now i required sine wave with freq. upto 400khz plz gimmi some tips.

7. ## Re: sine wave with different frequency using FPGA

Hi,
I am generating 25MHz Sine wave using DDS core. Simulation is working perfectly but hardware is not working. I am implementing simple DDS core. Can you please tell me what can be the possible reason?

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8. ## Re: sine wave with different frequency using FPGA

but hardware is not working
I fear, that's far from a clear problem description.

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9. ## Re: sine wave with different frequency using FPGA

My code for the core is
entity dds_test is
Port (
clk : in STD_LOGIC;
rdy : out STD_LOGIC;
sine : out STD_LOGIC_VECTOR(5 downto 0));
end dds_test;

architecture Behavioral of dds_test is
component dds
port (
clk: IN std_logic;
rdy: OUT std_logic;
sine: OUT std_logic_VECTOR(5 downto 0));
end component;

begin
Sine_wave : dds
port map (
clk => clk,
rdy => rdy,
sine => sine);

end Behavioral;

and simulation results are

10. ## Re: sine wave with different frequency using FPGA

O.K., the simulation looks plausible. So what's happening with the hardware design?

11. ## Re: sine wave with different frequency using FPGA

i am assigning that 'rdy' pin to a led but led is not glowing on fpga.

12. ## Re: sine wave with different frequency using FPGA

the the LED active low?

13. ## Re: sine wave with different frequency using FPGA

no it is active high

14. ## Re: sine wave with different frequency using FPGA

If I understand right, your DDS design has all fixed parameters and no programming interface, so RDY is actually useless. But is should work if present. Reasons that I can imagine:
- DDS core is hold in reset
- IO pins not assigned correctly

There are means to check each point separately.

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15. ## Re: sine wave with different frequency using FPGA

yes, you are right all parameters are fixed. And what do you mean by DDS core is in Reset state? how i can check it?

16. ## Re: sine wave with different frequency using FPGA

If you omitted SCLR, the DDS core can be only hold in reset by the global FPGA power-on reset. Do you check, if the intended FPGA design is loaded at all? Is it clocked correctly? Are any other parts beside the DDS core working? Output pins driving out?

17. ## Re: sine wave with different frequency using FPGA

It's good to add a heartbeat signal to every design to verify that the bit file loaded like FvM said. Just divide your clock to 2 Hz and have it clock a T flipflop and send that signal out to the LEDs. If you don't see your heartbeat, you have bigger problems than the DDS IP core

18. ## Re: sine wave with different frequency using FPGA

[/COLOR]I just checked it that core is working perfectly but led is not glowing. Can you please tell me where the problem can be?

19. ## Re: sine wave with different frequency using FPGA

If you have access to Chipscope, I would add an ILA core and see what's going on inside the FPGA.

Originally Posted by capcas
[/COLOR]I just checked it that core is working perfectly but led is not glowing. Can you please tell me where the problem can be?

20. ## Re: sine wave with different frequency using FPGA

Originally Posted by rhearty1
It's good to add a heartbeat signal to every design to verify that the bit file loaded like FvM said. Just divide your clock to 2 Hz and have it clock a T flipflop and send that signal out to the LEDs. If you don't see your heartbeat, you have bigger problems than the DDS IP core
Originally Posted by jimwu88
If you have access to Chipscope, I would add an ILA core and see what's going on inside the FPGA.
Both good advice. A slow divided clock (2 Hz or some such) blinking a led is handy visual feedback during development. And chipscope is useful if you have to do some more invasive checking on the internals of your design. The blinky led is all of 5 minutes work, the ILA may be a little more work but will get you more debugging capabilities in return.

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