Chargepump - MOSFET Bulk connections

Hi,

I simulated 4-stage Charge pump with dynamic CTS.

When I have given 1.8V of input voltage, I observed 7.72V as output when the NMOS bulk is connected to ground and PMOS bulk connected to drain.(Highest potential)

At the same time, I observed 8.3V as output when NMOS bulk and PMOS bulk are connected to source.

Can you please let me know while designing any circuit is it good to consider body effect or neglect the body effect?

If VSB = 0, we have neglected body effect and if VSB !=0, then body effect comes into picture.

So, whether we have to neglect it or consider it?

What may be the load current for low power applications? Load is always dynamically varying.

So, how should we know what is the load current of the system?

I may connect chargepump to some another block for example EEPROM or any digital block in my design.
What are the different parameters to consider while manipulating load current?

If I vary the load resistance,then it is equivalent to varying load current. Am I right? Please correct me if I am wrong.

Thanks,
Shaikss.

You have to take the body effect in to account or have to repent later having severely under performing devices.
You can estimate the dc current taken by the loads, design the charge pump and include a capacitor at charge-pump output to handle the current spikes (this will slow down the charge pump output rise as well)

saro_k_82 said:

You have to take the body effect in to account or have to repent later having severely under performing devices.
You can estimate the dc current taken by the loads, design the charge pump and include a capacitor at charge-pump output to handle the current spikes (this will slow down the charge pump output rise as well)

Click to expand...

Thanks Saro.
Why there is increase in output when body effect is neglected.
Whatever results I have posted in my earlier post are the simulations with load cap and load resistor.
I have attached the snapshot of the circuit.

For example, if there is a ground in my schematic, and since it is the lowest potential, it is better to connect NMOS to ground.
Normally, we connect NMOS bulk to ground and PMOS bulk to Vdd when dc vol is applied.
What should be the case if ac input is applied?
Since AC is continuously varying, how should I know that which terminal is at lower potential?
Moreover, source and drain are interchangeable. Will the terminal with highest potential be drain or source???

Please shower some light on this.

When the body effect is included, in this case the source is always at a higher potential than bulk and this difference increases at every stage, so VTH increases from stage to stage which decreases the driving capability of each stage.
The bulk of the PMOS has to be connected to the the terminal that has the highest potential of the drain and source (which would require a separate well) or to the highest potential in the circuit. The same applies for NMOS but the separate well costs more here. The highest (or lowest) potential for the bulk must be more than what the AC variations provide at all times.

Yes source and drain are interchangeable. The one with the highest potential will act as Source for PMOS and drain for NMOS.