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[SOLVED] when using ir2110 config the deadtime eaten

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electrophysics

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hi
please refer to the attachment for problem issue. i'm using ir2110 for fullbridge switching supply. the input of ir2110 has a reasonable deadtime (1.2usec) operated at 30KHz each. but when on testing there is no deadtime in between the mid point to ground of both transistors phase legs. on looking with scope the lower ground level mosfets of both sides have a deadtime on their gate. however on upper both mosfets this deadtime is eaten when gate voltage is reached approx equal to test voltage of 20v on falling edge. this is looking to be a bottle neck in first place. how to resolve it? why is it so.
 

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Where do you see dead times "eaten up" in your diagram? It's actually an unknown combination of transistor switching times and load dependent H bridge commutation behaviour. Without a load resistance, the output voltage (tp1) doesn't change before the load side switch is activated. Seeing Vgs dropping to about zero (first step in tp2) suggests correct switching operation.

Repeat the test with sufficient load current.
 
Hello Dear ElectroPhysics
Where those waveforms are from ? out put ? that step that you can see at your waveform is due to the discontinuous behavior of your circuit , that you can improve it simply .
By the way , as i have seen in it's datasheet , it can't create dead time independently .
But it's input contains 2 schmitt trigger not gate , that you can create dead times with those internally gates and 2 capacitor and 2 low power fast diodes.
BTW:
I think the value of your boot strap capacitor isn't proper too . you'd better to increase it .
I hope that i understood your question correctly.
Best Wishes
Goldsmith
 

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