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ringing and over/undershoot is increased with shorter rise/fall time. If your rise/fall time is greater than 2-3 ns, you probably don't need to worry about trace impedance. But if your signal has rise/fall time shorter that 1 ns, you must ensure constant impedace and proper termination. However some termination schemes (serial termination) use the efect of overshoot, so it doesn't have to be a bad thing.
Find some great application notes from ON Semi about ECL termination and a great ECL book called ECL systems design handbook, practically a bible for ECL techology
Overshoot may be avoided by placing a resistor at the source. It is often called source resistance. Although the resistor will less the amplitude of signal at same time, it will match the resistance at source terminal. I think the undershoot may be produced by the cross talk noise at most cases.
It not only a PCB layout problem, but also circuit design. In PCB layout, try to isolate the high speed signal to prevent it cross-coupling to other signals. Correct grounding scheme is also help a lot!
Hi,
You can find details in this book :"High-speed digital design, a handbook of Black Magic". It's a good reference.
You can look for it on ebook forum.
Pay attention to over and undershoot in High Speed Digital Design, becuase these transient can also exceed the maximun allowed voltage range of the I/O and reduce the reliability of a design.
Overshoot and undershoot taked place due to impedence mismatch as many has mntioned above.
generally it is 3% to 5 % of the maximum value sometimes it will be mentioned in the datasheet directly but many tims it is mentioned indirectly
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