muthuram1984
Newbie level 6
Hi,
I have to design a sequence detectors for the serial inputs for the following conditions using FSM
1. It should give output as one when it detects the sequence "1010"
2. It should give output as one when it detects the sequence which is divisable by 5(eg. 1010, 0101)
Please let me know how many states we need and how can we design this using FSM?.. i need FSM diagram...please help me
Thanks
Muthu
I have to design a sequence detectors for the serial inputs for the following conditions using FSM
1. It should give output as one when it detects the sequence "1010"
2. It should give output as one when it detects the sequence which is divisable by 5(eg. 1010, 0101)
Please let me know how many states we need and how can we design this using FSM?.. i need FSM diagram...please help me
Thanks
Muthu