D-latch: should be simple?

Hope this is the right place to post such a question... I've created some NAND gates in a program called logisim (google it - it's free!) and am trying to create a D-latch. The individual NAND gates work fine and give the correct output but - as you can see from the attached image - when everything is all hooked up the circuit isn't working. If anyone could take a look at the attachment and give their thoughts, or direct me somewhere better to ask the question, I'd appreciate it greatly!

The Image:

thanks!

Each mosfet needs sufficient gate voltage in order for it to turn on.

N-mosfets reference their gate voltage to the source terminal (more negative).
P-mosfets to the drain terminal (more positive).

For them to work you must provide a definite voltage at the reference.

Conditions to check:

* Does the energizing of any mosfet depend on another mosfet already conducting?

* Similarly, if you turn one mosfet on or off, does that cause another's gate to lose it's definite reference?

One or both of the above looks as though it may be happening in your schematic.

To remedy this you may need to delay certain gate signals, so that mosfets turn on in a sequence that works (you must determine what sequence).

Or certain glitches might be remedied by increasing gate voltages (by several multiples). Both in real circuits and in simulations. Supposedly it shouldn't work but I've seen it claimed to work.

The individual NAND gates work fine and give the correct output but - as you can see from the attached image - when everything is all hooked up the circuit isn't working.

Click to expand...

You'll find the answer by watching Logisim operation thorougly. It's simply unable to simulate series connected transistors correctly. This is already suggested by the transistor element description, particularly releated to the signal flow arrow.

Wow guys thanks for such great input! I know a little more about mosfets and how logisim works. I'll try to find a way around this shortcoming. I was going to make a Dlatch from transistors but I suppose I might have to settle for the 'premade' dlatch :-(. Anyways, thanks again!

It should work with NAND gates as basic elements.