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Below equations are used to check setup and hold time.
Setup time equation
1. Tcq + Tcomb< Tskew +T - Tsetup
Hold time equation
2. Tcq + Tcomb> Tskew + Thold
Setup check is done during synthesis after that it is done after every step of PNR. Hold check is normally done after Clock Tree Synthesis (CTS).
I am asking setup and hold check for source synchronous interface i.e. an interface where control or date signals are being synchronized first and send it to the interface. The answers above are for normal situation where there is no clock domain crossing happening. So the above answers are not for source synchronous interface for which the thread was started.
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