Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

design of differential pair comparator

Status
Not open for further replies.

lhlbluesky

Banned
Joined
Mar 30, 2007
Messages
558
Helped
5
Reputation
10
Reaction score
5
Trophy points
1,298
Location
china
Activity points
0
in dynamic comparator design of differential pair, i have some questions here.

1.jpgfig1 is the schematic, fig2 is the design equation.

d=ID5/ID6, e=Vin/Vref, W1=W2, W3=W4.

but how to decide the value of ID5, ID6, d? because M5 and M6 are controled by clock signal Vclock, so the current of M5, M6 is difficult to set, so how to get an accurate ratio of d?

besides, k' is not a constant also, how to consider its value?

in my design, the value of ID5 and ID6 is changing with different size of (W/L)5 and (W/L)6, and the offset is different also for different size of M1~M4 and M5~M6, how to understand this?

please help me, and give me a clear explanation about the diferential pair comparator design, thanks.



 
Last edited:

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top