Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Req on Information of "C to VHDL" for FPGA

Status
Not open for further replies.
S

sanjay

Full Member level 1
Joined
Jul 4, 2003
Messages
98
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,012
Hi all,

Just wanted to know, if any of you have made use of this special "NICE" language tool for your projects..

I am looking into such software, so just wanted if any of you could share information regarding ease of developing applications for FPGA with code development in C, which can later be translated to VHDL..

Searching on net, I did came across some companies who are producing these type of development suites.

**broken link removed**
http://www.impulsec.com/

If any one has used some software that doest the JOB.. please share your experience..as I am looking to try it out.. but not sure which one is the best to go for...
 

Hi

Take a look at this software from Mentor.
hxxp://www.mentor.com/c-design/catapult.html
It also use C language. I don't have any experience with this software. The best solution will be requesting for Evaluation Version.

Best reg
 

C to VHDL ... well is NOT that EASY
The truth is that there are new languages showing up that are called SOMETHING C .. But i really NOT a C language .. C is a SEQUENTIAL language .. VHDL is parallel .. So to be equivalent these NEW C-like languages have to have a lot of new FEATURES in order to describe PARALLLEL constructs ..
And some of those languages are NOT ELEGANT anymore .. But very twisted .As an example those examples provided by CELOXICA to migrate PURE C to HANDELC are not EVIDENT or strightforward ! ..
 

I agree with eltonjohn.

But if you want to transform the sequential algorithm into
sequential block you would better use Celoxica.
If you want the pure parallel block you will use Verilog which is very similar to C.
A lot of intermediate solutions is the problem of system or behavioral synthesis which at present is not formalized and authomatized in general yet.
 

hi,

in addition to the m*ntor catapult C synthesis and "C*loxica" which are for converting the C to VHDL effectively.. thou they have framed very difficult and high optimised level of programming for conversion, tehre s another called "Ac*elchip" which is for converting the matlab code to VHDL(syntehsisable). they propose so. home page is

/http://www.accelchip.com

/cedance
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top