prasguy
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Hi All,
Pls tell me , how much spacing shd i provide b/w high voltage traces? for ex: if trace is carrying 100v.
We know that trace width is depend on current carrying, how abt trace spacing for high voltages?
Also, what shd be trace spacing between high voltage trace and signal trace, also whether we can provide same spacing in signal layers what we give for planes in internal layers? I use to give 20mil clearence in plane layers between the splits. So, shall i follow the same in external layer also?
-Thanks-
Pls tell me , how much spacing shd i provide b/w high voltage traces? for ex: if trace is carrying 100v.
We know that trace width is depend on current carrying, how abt trace spacing for high voltages?
Also, what shd be trace spacing between high voltage trace and signal trace, also whether we can provide same spacing in signal layers what we give for planes in internal layers? I use to give 20mil clearence in plane layers between the splits. So, shall i follow the same in external layer also?
-Thanks-