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Clock shifter by 90 deg

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vasusathiyam

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Hi all,

Is there any way to shift the clock by 90 deg(only by using digital circuits).

Condition:

Input is only the clock signal(have to shift)
 

Presuming, that delay lines and PLLs should be considered in part as analog circuits, no. A complete specification would need the frequency range spanned by the clock.
 

Hi FvM,


of course.... But i done a multiplication using the out delay lines of PLL... After that i am having only one clock in my hand which is 500MHz(Consider this as ICLK)... Now i need QCLK
 

As you know about the PLL stuff, what are you exactly asking for? With my favourite FPGAs, I have the option to generate a phase shifted signal at a second PLL output.

On the other hand, 90° translates to 500 ps at 500 MHz. Generating precise I/Q phase relation will be rather difficult considering expectable routing delay skew. I won't suggest logic cell delays as a serious solution, because it undergoes an about 1:2 PVT (process, voltage, temperature) variation.
 

i knew tha PLL concept.... r8 nw am also taking second output as QCLK....but i am having the vco tracking upto 500MHz but i need to generate 750MHz without changing the any design like PFD, charge pump , divider and vco in PLL...
 

Yes, interesting details. Perhaps you have some more?
 

So let me understand this... you need a new functionality
yet you will not change the design?

What makes you think this is going to happen?

Now you might consider that mixing f and f/2, can give you
0 and 3/2f tones. But achieving the desired phase relation,
there's the rub.
 

s i wont change my design further thats y am asking now......

It makes my design to get 40-750MHz output from the PLL..... supply as 1.1V
 

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