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They say static IR drop causes SI noise and delay.

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pavanks

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I understand that by decrease in operating voltage due to IR drop, we will get more cell delay. But how does IR drop cause increase in SI noise? Any one has any idea on this ?
 
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1. During IR drop Vdd becomes lower. (IR)
2. Different areas of IC have little different Vdd becuase of limitation on power rails connection. (delta Vdd)
3. On the other hand during fabrication Vth of some MOS can be higher. (delta Vth)

So logic Hi can be treated as Logic Low if:
Vdd - IR - delta(Vth) - delta(Vdd) < Vth.
 
kornukhin said:
1. During IR drop Vdd becomes lower. (IR)
2. Different areas of IC have little different Vdd becuase of limitation on power rails connection. (delta Vdd)
3. On the other hand during fabrication Vth of some MOS can be higher. (delta Vth)

So logic Hi can be treated as Logic Low if:
Vdd - IR - delta(Vth) - delta(Vdd) < Vth.
Click to expand...

What ur saying is functionality failure. I wanted to know how noise comes into picture with more IR drop?
I hope my Q is clear to u?
 

Lower Vdd => higher leakage current => more lower Vdd.
pavanks, I hope I am talking about the same thing you've expected.
 

I am not getting ur point here.

Let me put it again

How can IR drop cause noise in the design ?

Thanks
 

SI noise and delay are similar things caused by cross-talk through capacitor in layout. If IR drops some portion of the circuit slows down and which in turn increase the chance of overlapping timing windows between timing paths that are physically close to each other. Timing report may hen have worse SI noise/delay.
 

If you have less voltage is applied to the VDD pin of the cell,then the noise margin also will getting reduced.(Because VIHmin get reduced and VILmax also increased) .Because of this there is a possiblity that crosstalk noise can increase.I hope this will help...


Regards,
sathish
 

Please can somebody explain what is SI noise ?
 

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