+ Post New Thread
Results 1 to 4 of 4
  1. #1
    Junior Member level 3
    Points: 1,605, Level: 9

    Join Date
    Aug 2004
    Posts
    27
    Helped
    0 / 0
    Points
    1,605
    Level
    9

    In IO pad, why do we need a floating Well?

    A lot of IO design use floating Nwell on the PMOS output transistors. For input IO cell, I guess this is to do with 5V tolerance. But why do we need a floating Nwell in output cells.
    Any one got a clear picture on this issue?

    •   Alt13th August 2004, 10:53

      advertising

        
       

  2. #2
    Full Member level 6
    Points: 5,932, Level: 18

    Join Date
    Aug 2004
    Location
    Scotland
    Posts
    384
    Helped
    143 / 143
    Points
    5,932
    Level
    18

    Re: In IO pad, why do we need a floating Well?

    For 3.3Volt logic IO,s that need to be 5Volt tolerant, a way of ensuring that the PMOS gate oxide never sees 5.5Volts across it is to use floating wells.



    •   Alt15th August 2004, 16:47

      advertising

        
       

  3. #3
    Advanced Member level 3
    Points: 7,066, Level: 20

    Join Date
    May 2004
    Posts
    874
    Helped
    68 / 68
    Points
    7,066
    Level
    20

    Re: In IO pad, why do we need a floating Well?




    •   Alt16th August 2004, 04:30

      advertising

        
       

  4. #4
    Full Member level 1
    Points: 2,536, Level: 11

    Join Date
    Jun 2001
    Posts
    107
    Helped
    4 / 4
    Points
    2,536
    Level
    11

    Re: In IO pad, why do we need a floating Well?

    For protecting the bonding wire connected with sub when bonding



+ Post New Thread
Please login