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    Regarding Serial Input Image Sensor

    Hi,

    I was developing an image processing core to process data from the input image sensor. However I was unable to find out any document/datasheet
    regarding the input in Serial Format. Could anybody let me know about the standard interface signals for the serial input/Clock recovery for serial sensor data ? Is there any standard document which has to be referred ? Kindly let me know.

    Thank you.

    •   Alt12th September 2011, 08:07

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    Re: Regarding Serial Input Image Sensor

    Are you referring to the serial interface on your image sensor? Do you have any documentation on your image sensor?

    BigDog



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    Re: Regarding Serial Input Image Sensor

    What image sensor do you use?



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    Re: Regarding Serial Input Image Sensor

    Hi,
    The data input to my core will be through LVDS interface (BT656 format with EAV,SAV etc.) I am told. That is all the info I have. Some clock recovery has to be done I guess and further the data has to be deserialized and passed onto my core.
    I tried to refer to some of the clock recovery techniques however I could not find a proper completely digital CDR ckt. I am not sure if PLL based can be implemented on an FPGA.
    Kindly do let me know if there is a completely "Digital" solution to clock recovery without the use of PLL even if it is jitter prone.



    •   Alt13th September 2011, 14:00

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    Re: Regarding Serial Input Image Sensor

    Without the proper documentation this project could be quite a rocky road.

    Here is the BT.656 Recommendations Document:

    Recommendation ITU-R BT.656-5

    The above document includes information on SAV and EAV timing reference signals.

    BigDog

    ---------- Post added at 07:26 ---------- Previous post was at 07:06 ----------

    I also found this example of displaying the output of a camera with BT.656 format via I2C bus on a SVGA monitor using a Xilinx Virtex 2 Pro FPGA:

    Capturing the image from an NTSC Camera and displaying it live on a SVGA monitor


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    Re: Regarding Serial Input Image Sensor

    Hi BigDog,

    Thanks a lot for the documentation and most importantly the timing reference signals in that. That solves a part of my problem.
    However still the clock and data recovery needs to be done. I am referring the following document
    http://www.xilinx.com/support/docume...es/xapp868.pdf.
    However I am not completely able to understand how exactly the clock recovery is done in the above document. Though I understand the concept,
    I am not able to figure out the details about the implementation. Any help on the details of the implementation would be helpful. Thank you.



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    Re: Regarding Serial Input Image Sensor

    If your camera module has an I2C interface like in the example, the master generates the clock in your case the FPGA.

    Describe the pinout on the camera module. How many pins? Are there any designations/labels for the pins?

    BigDog



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    Re: Regarding Serial Input Image Sensor

    Hi bigdog,

    The camera module has an LVDS interface for serial data I am told.



    •   Alt14th September 2011, 08:02

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    Re: Regarding Serial Input Image Sensor

    Quote Originally Posted by anandkumarcr View Post
    The camera module has an LVDS interface for serial data I am told.
    The camera may have what is referred to as an I2C + Data interface. Command and Status are sent and receive via I2C and the Image Data via LVDS.

    Similar to this camera:

    Toshiba TCM8240MD

    Appnote TCM8240MD

    Examine the following example, which demonstrates interface a LVDS Camera interface with an Atmel AVR, C source is included as well.

    MT9V032 LVDS camera board

    Most of the cameras I have seen with an LVDS interface have an additional signalling for commands and status, often an I2C interface.

    However, I not an expert with these types of devices, so without further information concerning your camera its difficult to say.

    BigDog



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