sar adc capacitor leakage current

i design a cap type charge sharing sar adc ,
it needs to be dischage when each conversion cycle.
please see the pic show as below ,
the node vx=0 when sampling mode , and it is pull down by N3.
but when the hode mode , the N3 should be disable.

but , since the vx will be negative voltage , the MOS N3 body diode will flow to have a leakage..

how to solve this problem , to replace the switch in another kind of solution ?

pianomania said:

... since the vx will be negative voltage , the MOS N3 body diode will flow to have a leakage..

how to solve this problem , to replace the switch in another kind of solution ?

Click to expand...

Connect N3's bulk to the drain instead of to the source.

thank you for your advice,
but the vx is not always negative voltage, sometime the voltage is greater than zero , sometimes less than zero , when normal operation.
thus ,the soultion may not work
is there any other solution for this ?

pianomania said:

... the vx is not always negative voltage, sometime the voltage is greater than zero , sometimes less than zero , when normal operation.
thus ,the soultion may not work

Click to expand...

Anyway, such a connection requires a twin (double) or triple well process which allows for isolated NMOSFETs. If the process also provides Schottky diodes, you could connect 2 Schottky diodes from source and drain to bias the bulk to the most negative potential (both anodes to bulk).

In this case it doesn't matter if vx is positive or negative against GND : No current can flow then between vx and gnd (when N3 disabled). The Schottky diodes will always bias the bulk appropriately, but this also means the terminal which biases the bulk is the real source, and, thus, the reference terminal for the control signal ("disable").

pianomania said:

is there any other solution for this ?

Click to expand...

If the process doesn't allow for isolated NMOSFETs -- but provides Schottky diodes -- you could use a PMOSFET as switch, bias its bulk (n-well) by 2 Schottky diodes (both cathodes to n-well) and invert your control signal. Be aware you have to refer it to the most positive potential, either vx or gnd .

BTW: If gnd-0.5V ≦ vx ≦ gnd+0.5V you need not change anything! ;-)

thank for your help.
but i found another current conduction path , not relative to the body diode.
since the gate voltage of the charge MOS (disable) has two voltage , 0 and vdd , the 0 is for disable the dischage MOS. but in this situation, the MOS is not disable , since the drain is negative voltage , gate voltage > drain , the mos can be "reversed conductive". not through the body diode..
thus by switch the bias of the buck can't solve the unwanted leakage.
if we change it as PMOS , the phenomenon still exists.

and if we add diode serial connect with , when the dischage phase , the VX can't be pull down and discharge to Zero.

so , could you find another method to solve this problem?

pianomania said:

... since the gate voltage of the charge MOS (disable) has two voltage , 0 and vdd , the 0 is for disable the dischage MOS. but in this situation, the MOS is not disable , since the drain is negative voltage , gate voltage > drain , the mos can be "reversed conductive". not through the body diode..

Click to expand...

Right, but only if |vx| > Vth .

pianomania said:

if we change it as PMOS , the phenomenon still exists.

Click to expand...

Correct.

pianomania said:

and if we add diode serial connect with , when the dischage phase , the VX can't be pull down and discharge to Zero.

Click to expand...

Of course not.

pianomania said:

so , could you find another method to solve this problem?

Click to expand...

If |vx| > Vth it seems you must have available somewhere a negative voltage? If so, you could use it to disable the NMOS.
Otherwise: use a different topology!