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4-bit parity generator

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MjWasHere

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Want to design a circuit that takes a serial data stream from data in input. The output of the
circuit is high if data in on previous four clocks has even number of ones. E.g. the
output on nth clock is high if the data in on clocks (n-1), (n-2), (n-3) and (n-4) has
even number of ones.

Can anyone please help me with the State Machine of the same ?

Thanks.
 

Hi MjWasHEre,

May be by using a binary counter feed by your data stream, and you test the bit 0. But it should be 1 if odd and 0 if even, so just add an inverter.
 

Hi
Well i will suggest you a rather easy solution. Design a 4-bit shift register (SISO) and take the outputs of the 4 flipflops and give it to 4 i/p XNOR gate the o/p of XNOR gate will be ur even parity generator.
Hope u will find this post helpful.
 

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