allanvv
Advanced Member level 4
I'm looking at page 9.7-58 from: **broken link removed**
A few questions:
1. Using the usual non-overlapping clocks, if both are off at the same time, figure b's op amp will become open loop. Isn't that bad?
2. Is figure c parasitic insensitive?
3. I plan on putting the input capacitor outside the circuit. I have very low accuracy requirements, and the input cap will be on the order of nanofarads. That shouldn't cause any problems right? If I don't really care about parasitics, then should I just implement figure a?
A few questions:
1. Using the usual non-overlapping clocks, if both are off at the same time, figure b's op amp will become open loop. Isn't that bad?
2. Is figure c parasitic insensitive?
3. I plan on putting the input capacitor outside the circuit. I have very low accuracy requirements, and the input cap will be on the order of nanofarads. That shouldn't cause any problems right? If I don't really care about parasitics, then should I just implement figure a?