praveenji
Newbie level 1
hi all,
if somebody know about SEU in fpga please take a look at it!
in virtex 5 to correct and detect SEU effect, in build readback crc access configuration memory through ICAP and read a frame at a time and then calculate new CRC value. this CRC value is compared with the previous store golden CRC values. if its mismatch FRAME_ECC used to correct this frame data. But instead of new CRC value, golden CRC have SEU then how readback CRC detect it?
thank!
if somebody know about SEU in fpga please take a look at it!
in virtex 5 to correct and detect SEU effect, in build readback crc access configuration memory through ICAP and read a frame at a time and then calculate new CRC value. this CRC value is compared with the previous store golden CRC values. if its mismatch FRAME_ECC used to correct this frame data. But instead of new CRC value, golden CRC have SEU then how readback CRC detect it?
thank!
