itmr
Member level 3
hi all
i need yours help for some little implementation algorithm in FPGA
i am using uart that gives me 7 bytes of ascii codes , 6 bytes on integers and one byte of point in that way XXX.XXX
i need to create a floating point vector - i mean to sub x"30" from each integer byte and collect the integers to floating point vector/
(after i create this vector i need to comparison 2 follows vectors)
some one have a good logic idea for me - without use any build in multiplier?
i need yours help for some little implementation algorithm in FPGA
i am using uart that gives me 7 bytes of ascii codes , 6 bytes on integers and one byte of point in that way XXX.XXX
i need to create a floating point vector - i mean to sub x"30" from each integer byte and collect the integers to floating point vector/
(after i create this vector i need to comparison 2 follows vectors)
some one have a good logic idea for me - without use any build in multiplier?