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npn transistor action CE mode

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chandri

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how active region takes place in npn transistor
 

In brief and for most ordinary applications, an npn transistor could be seen as working in 3 modes. All modes depends on its base current (MOSFET on gate voltage):

(1) The base current is zero (or negative if its Vbe junction is biased in reverse so the current value is rather very small as long it is below Vbe breakdown voltage which is usually also small). The port CE is off. That is its collector current is zero if Vce is also below its breadown voltage (given on its datasheet)

(2) The base current is positive, so there will be a collector current as well taken from the supply through a load (a resistor for example). If the voltage drop on the load is not high. That is Vce= Vcc - Vload is about 1V or higher, we can expect the ratio of Ic/Ib to be relatively high (it may be called the DC current gain, HFE). In this mode, the transistor acts as a linear ac amplifier dVc = -Rload*Hfe*dIb. The minus sign shows that if Ib decreases (dIb negative), Vc increases (dVc positive)

(3) If Vce is needed to go down close to zero so the transistor will act as an ON switch, the base current should be increased further. But when Vce becomes rather small say 0.4V and below, the current ratio Ic/Ib becomes relatively low. This is obvious because no matter how much we keep increasing Ib, Ic will be rather constant (approximately Vcc/Rload). So if we know Iload (Vcc/Rload) we can start assuming Ic/Ib = 20 to calculate Ib that turns the transistor on (said its Vce in saturation, note that in case 2 its Ic is saturated). The value 20 could be made higher for small transistor and it may need to be lowered in case of power ones. The idea is to drive the base with enough current that lets Vce be low enough to activate the load or drive the next digital stage properly. Increasing Ib more than necessary will usually slow down the transition to the off state and obviously the power efficiency decreases.

3 modes: off, linear and on.

Kerim
 

CE mode in transistors is widely used in amplifiers due to its best power amplification (voltage and current amplification included).

npn transistor in CE mode: well here remember two important points while using transistor in active mode( it's actually general for all modes)
1> the emitter junction i.e junction formed by the emitter and base of the transistor should always be forward biased.
2> the collector junction i.e junction formed by the collector and base of the transistor should always be reverse biased.

note: this is the d.c biasing to obtain the desired operating point(depends on ur needs, best to keep it in the middle of the active region, datasheet will be provided for the transistor by the manufacturer). and we have to swing our ac input around this operating point, and note that the amplification is not as by itself but due to the conversion of d.c energy to a.c energy, so as to get amplification.

n(E) - p(B) - n(C) is your configuration.

so connect the positive of d.c source to the base, and positive of other d.c source to the collector and the other terminal of both and emitter to the ground. the d.c input at the base must be lower than the d.c input at the collector so as to work in the active region.

well you have biased your device and u are ready to apply the input and take the output: u can refer to any CE mode figures of any book for that.

the transistor action is simple. please refer NN Bhargava book on electronics for transistor action, it's explained beautifully there. the same basic action takes place for any mode.

and as you know the diode equation, well u'll have to go into a bit details of microelectronics(book: BJ Streetman & S Banerjee) for it, which u gradually will being an electronics student. i'll explain mathematically in a simple way, as microelectronics and quantum physics is involved here, the things are not exactly as we see them due to the laws of quantum mechanics, actually i too also don't have a great idea about them. theoretically transistor action takes places neverthless, u might know it:
I = Io( exp(V/Vt) - 1 ) where, V is the voltage applied across diode , Vt : thermal voltage, for simplicity i am considering eta(related to recombination factor) as 1
Io: reverse saturation current and I: current through the diode.

now treat the emitter junction as a diode in fwd bias. V wiil be Vbe i.e u can control it through input voltage application( actually we control the input current i.e the base current but it's a bit complicated) and I will be the emitter current Ie . now as u increase Vbe in the fwd direction , Ie increases, as the collector current Ic is nearly equal to Ie( due to reversed collector junction and minimal doping and thinness of base region), Ic also increases. as Ic is the output current (through the load) , the output voltage is directly proportional to it, and as Ic increases, the output voltage increases.

this is one of the simple explanations. i hope it would help u a little if not more. read the above books for more, gradually with reading many books and coming across many knowledgeable people , u'll get a complete idea of it: crystal clear. i too m trying for that. all d best. :razz:
 

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