what are the inputs for lfsr,and bist

can any one tell me what are possible inputs for a lfsr and a bist
as they will be producing output at a random sequence and test on its own respectively .
but what could be possible inputs for both lfsr and bist

Check out this project:
LFSR-Random number generator :: Overview :: OpenCores

The possible inputs can be:
1)a generic parameter which decides the period of the sequence generated.
2)seed of the lfsr.
3)(may be, not always required) an output enable.
4)a clock.

output of lfsr is the random sequence.

thank u sir but my doubt was still not solved

can i know how would lfsr generate pseudo random pattern i know its operation but i dont know about seed of lfsr

mainly how will it be initiated to taking one by one pattern in it ,how wil it initialise to work actually do some power required as input or some sort of other input needed for it to start its pattern generation

if u dont mind kindly tell me sir

you can use any random bit sequence as the seed for LFSR except :
1)all 0's if your LFSR is XOR gate based
2)all 1's if your LFSR is XNOR gate based

thank u avinash but my ambiguity is not cleared still

input is ok but how will it start to initialise and generate random pattern
shuld it generate on its own if so it should be having some driving factor to generate its pattern
2)will it need a power supply to generate pattern or any other factor as a input for that "thats my doubt"

kindly help me out


thanking u

it uses registers, so you'd need some power supply and clock signal to build them. For initialization, you'd need to use a reset. something similar can be done for the receiver.

the receivers attempt to determine what the next input is based on the previous N inputs. In normal cases, after N inputs, the receivers will have seen enough of the pattern. Thus, if the receiver's "failure" output signals are held in reset (or gated off as appropriate) during the first N (or more) cycles, the receivers will have had enough time to synchronize and the false-positives will be eliminated. the alternative is to synchronously reset both transmitter and receiver and initialize them to the same seed value.

This is a little be better, but also makes the reset lines a potentially difficult to route net. the resets can be made easy if the receiver is held in reset for a "long" time, like 2N+ cycles. In that case the transmitter can also be asynchronously reset as long as the seed has certain properties like a long run of 1's. Still, it may be worth it to just synchronize the resets on the transmitters so testing is consistent on every run.

thanking u sir for ur clear explanation now i got it thanku very much

avinash can i get clear explanation about whts meant by seed of lfsr is that the transition state or some other thing
kindly tell me