abrand
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I am trying to get a simple frequency multiplication scheme to work, but am having trouble getting the PLL to lock.
Background:I am sampling (frequency measurement) my signal at 1Hz, I can not sample any slower, and need to get a measurement resolution of 0.1Hz minimum. My input signal goes from 0-1kHz, so at the very low frequencies i can not achieve my desired resolution. So I was trying to implement a PLL to multiply the signal by 10.
Design: I have a TTL 50% duty cycle square wave (not ac coupled) going into the signal input. I am using PC2 with a a first order LPF cutoff at ~100Hz, signal can very but not more than 100Hz in an instant (more like 1-10Hz change). The VCO range is set to ~10kHz according to the graphs and equations in the data sheet. I have a divide by 10 ,4018, in the feedback loop from the VCO to the comparator input.
It appears i am only getting noise on the VCO output, and not able to lock onto my input signal, which i am using a stable frequency generator for testing. I have been tweaking with the external components for some time now but have not been able to get the PLL to lock. I am currently breaking out my old control theory texts to properly analyze the transfer functions and phase plots.
Any ideas, suggestions or comments would be great. I have been hitting my head against the wall for some time now and may be missing something simple at this point.
Thanks
Background:I am sampling (frequency measurement) my signal at 1Hz, I can not sample any slower, and need to get a measurement resolution of 0.1Hz minimum. My input signal goes from 0-1kHz, so at the very low frequencies i can not achieve my desired resolution. So I was trying to implement a PLL to multiply the signal by 10.
Design: I have a TTL 50% duty cycle square wave (not ac coupled) going into the signal input. I am using PC2 with a a first order LPF cutoff at ~100Hz, signal can very but not more than 100Hz in an instant (more like 1-10Hz change). The VCO range is set to ~10kHz according to the graphs and equations in the data sheet. I have a divide by 10 ,4018, in the feedback loop from the VCO to the comparator input.
It appears i am only getting noise on the VCO output, and not able to lock onto my input signal, which i am using a stable frequency generator for testing. I have been tweaking with the external components for some time now but have not been able to get the PLL to lock. I am currently breaking out my old control theory texts to properly analyze the transfer functions and phase plots.
Any ideas, suggestions or comments would be great. I have been hitting my head against the wall for some time now and may be missing something simple at this point.
Thanks
