blueinsky
Newbie level 2
I have the library files of tsmc 90nm sram module. In the library I found the .db file and two .v files. One of the .v file is on RTL level. So I assume if I use the RTL module in my design and include the .db file in my link_library when I synthesize it in dc_shell, I should be able to get synthesized sram module in a black box. But I the result is still a register file just like I synthesized it without the sram .db file. What did I do wrong?