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floating point library.....

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watabe112

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hi....i want to ask....can a vhdl library be synthesize in verilog code.....can anyone help to explain to me.......i'm quite new in this.......
 

Most design compilers support mixed mode, VHDL components can be instantiated as modules in the verilog code.
 
can you teach me how to add library.....and how to use the library in the verilog coding.....for example...if i want to use the floating point library to make addition/sub....
for example if i have two floating point number........a and b in ieee754 format.....i want to add the number.....a+b....how do i code it using the library in verilog......
 

It is not that simple. You would have to create an entity in VHDL using the floating point library, and then instantiated that entity in verilog. You cannot use the VHDL floating point library direcly.

But then the VHDL floating point library is not very useful at the moment. You cannot synthesise with it for meaningful results. You need to use IP cores for floating point functions.
 

Yes. I understood library as synonym for an IP core in this case, because the term also designates all kinds of compiled code in VHDL.
 

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