systemverilog pass by ref question

In systemverilog I know class object are passed by reference, all other entities are passed by value.

so I dont need to use "ref" keyword in function argument list e.g.

function void (TX _tx);
endfunction

But what if I explicitly say function void(ref TX _tx); what will be passed in?

I wrote a small example program to test it, but I dont know how to explain it.

class TX
string name;
function new();
name = "123";
endfunction
endclass

task passObj(TX _tx);
_tx.name = "789";
endtask


task newObj(TX _tx);
_tx = new();
endtask

task passObjRef(ref TX _tx);
_tx.name = "789";
endtask


task newObjRef(ref TX _tx);
_tx = new();
endtask




the result is that
passObj and passObjRef has the same effect
newObj will not create a new object
newObjRef will create a new object

Could anybody explain what is passed when I use "ref" or not using "ref" for a class object?


Thanks

Rui