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design methodologies for 28nm technologies

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adhil1986

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what kind of design practises can i use to design more robust and power efficient circuits at 28nm technologies, i am a new layout engineer

Adhil
 

what are you designing?
 

I am helping the project leader to modify an SRAM layout. but methodologies for circuits in general.

---------- Post added at 08:18 ---------- Previous post was at 08:02 ----------

I am helping the project leader to modify an SRAM layout. but methodologies for circuits in general.
 

you need to specify your foundry info.........TSMC allows only vertical poly n all n all.........
 

i have the same question....

I'm working on SERDES ... and using global foundry 28nm SLP... please help
 

[....TSMC allows only vertical poly n all n all.........[/QUOTE]

No.It will also allow horizontal poly.

- - - Updated - - -

Hello, Can you please share some documents regarding 28nm process.I am currently working on it and facing much difficulty.Hope for help.
Thank you.
 

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