Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

"Correct" PCB fabricaton files

Status
Not open for further replies.

nux

Newbie level 1
Joined
Feb 23, 2011
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,301
I am doing PCB layout for a new (for me) company, and keep getting "informed" that my layouts are wrong...
Oldtimer A says, "The files should have moires on every layer."
Oldtimer B says, "Moires are no longer needed, don't use them."
Oldtimer A says, "Include cutlines on every layer."
Oldtimer B says, "Just put the cutlines on top layer and fab drawing."
Oldtimer C says, "Only the fab drawing needs cutlines."
Oldtimer A says, "Put titleblock on every layer."
Oldtimer B says, "Put titleblock on fab layer and just layer name on all other layers."
As you can see I am getting contradictory input from all of the "oldtimers" and although this info is usually obtained from the specific fab shop to be used, purchasing does (will) not give me that contact information...

My question is:
What information should be put on each layer of of a PCB layout?
 

I put some text indicating part number issue and what artmaster layer it is, this text is also included in the panel border. I havn't used moires since my artworks were photoplotted (1990 ish). That is it, but I do use ODB++ output. If I am using Gerber output, I will include the board outline on every layer so that allignment can be checked.
Basicly the minimum of extreneous garbage on the artmaster layers. I also write a PCB procurment document, relating what I want, cross referenced to the relevant IPC specs, then I only have to put the bare minimum on the fabrication drawing, ie what differs between designs, usualy a few dimensions and mounting holes. I aslo dont do drill drawings and havn't since 1990ish.
 
for the fabricator we are giving such information which is very important to make that board , and second thing what is your customer want.
there is no rule..
but in fad layer he need all the information like stack up , drill chart of plated through hole and non plated hole,tolerance,
in other layers you have to mention date and board file name.title block maintained in silk screen primary and secondary. assembly top and bottom.
Thanks and Regards
Praveen Bhat
 

And as 90% of the required information is common to all PCB's create a fabrication document that covers all these points, with reference to the relevant IPC specification and you cant go wrong.
Drill information is contained in either the "extended excellon" file (do not use basic excellon these days) or the ODB++ data, so a drill chart is not necessary, tolerance is again a standard feature and would be best in the standard procurment document.
Once you write and agree the procurment document with your manufacturers life becomes simpler, as all parties know what is expected of them.
 

moires -- what is it?? hearing for the first time!!
board outline/cutline - Only the fab drawing needs cutlines
title block and fab notes - Put titleblock on fab layer and just layer name on all other layers
 

I haven't heard of moires in connection with PCB layouts either. A moire is an interference pattern
(it should have an accent over the e but I cannot seem to select that).

Keith
 

Moires were used to align photoplots and photographed artworks in the old days (or as we'd say in Yorkshire, "when I was a lad"), and the last time I used them I was a lad!:smile: About 1989/1990 ish.
There were a variety of patterns and when doing tape ups, you could buy rub down ones. I had a look through some old stuff and found the attached example from some Gerber files, of two moire patterns that dont line up, but show what they look like.
The best ones were interlocking circular patterns, that when alligned were all black (a complete circle) so it was more accurate alligning thing up by eye.

So with reference to the origional post, oldtimer B is correct, you dont require moires these days.
 

Attachments

  • moire.jpg
    moire.jpg
    124.7 KB · Views: 63

I have been making PCBs for a lot longer than 1990 and have never heard fiducials being called moires. I am obviously not alone.

Keith
 

1990 was the last time I used moires on a design. Younger PCB designers would probably not heard of them, as they haven't grown up with red and blues, real photo-plotters etc. You and others may not of heard of them but as the origional poster and at least myself have shown, they are a part of PCB design history.
They were also called alignment targets, moire targets, and probably other names, the reference to moire being a reference to how these targets worked.
Used also optical drilling machines.
Older optical equipement used a variety of patterns for alignment, and probably most worked on using moire patterns to align layers. It is a technique still used today in a variety of applications where very accurate alignment is required (colour printing, chip manufacture) as using moire patterns allows a greated alignment accuracy with simpler optics or by eye.
 
Last edited:

FYI, forgot about the old Gerber format since we use ODB++, but having a trip down memory lane through my RS-274X spec, I found the definition of a Gerber Moire on page 23 (PDF page 29!). link below to Gerber Spec.

**broken link removed**
 

I am doing PCB layout for a new (for me) company, and keep getting "informed" that my layouts are wrong...
Oldtimer A says, "The files should have moires on every layer."
Oldtimer B says, "Moires are no longer needed, don't use them."
Oldtimer A says, "Include cutlines on every layer."
Oldtimer B says, "Just put the cutlines on top layer and fab drawing."
Oldtimer C says, "Only the fab drawing needs cutlines."
Oldtimer A says, "Put titleblock on every layer."
Oldtimer B says, "Put titleblock on fab layer and just layer name on all other layers."
As you can see I am getting contradictory input from all of the "oldtimers" and although this info is usually obtained from the specific fab shop to be used, purchasing does (will) not give me that contact information...

My question is:
What information should be put on each layer of of a PCB layout?

Never heard of moire too but to answer your question...
1. Aside from the designated layers (copper, silk, paste & mask), you just need to put a label for that layer so that the fabricator won't mixed the layer.
2. Fabrication notes must consists of impedance controlled lines information, layer stack up, drill table, board color, unit used, tolerances, irregular shaped hole notes & other special consideration that will be made on the PCB.
3. Title block is not necessary.

- KAK
 

As said earlier and as shown in the RS-274 spec, moire were mainly used when layout was done by hand or the early days of photo-tools when a lot of alignement was done by hand and eye, such as early composite layers (tracks and copper pour), they are now part of PCB history. If you want to move forward ditch Gerber and Excellon and move to ODB++, you will have less hassle with your manufacturers. I wuld also invest in some IPC specs (preferably the C-1000 set, if you are realy serious about PCB design, manufacture and assembly) as your PCB manufacturer will work to IPC specs and anything you do not specify will be done to the required level of manufacture (Class 1, 2 or 3).
Here is a list of suggested items you cover in a procurement spec, and relate to the relevant IPC spec:
Scope
Purpose
Type
Notation
APPLICABLE DOCUMENTS
STANDARDS
Order of precedence
REQUIREMENTS
General Requirements
Concessions
Qualification of Printed Board Manufacturer
Performance Specification
Defects Not Allowed
Documentation Requirements
Material Requirements
Material Handling and Storage
Metal-clad Laminates
Bonding Material
Copper Foil
Tented Vias
Registration (Internal)
Laminate Integrity
Bow and Twist
Conductors and Conductive Surfaces
Solder Resist
Surface Finish
Hole Size Tolerances
Tooling Hole Positions
Hole Plating
Marking
In copper identification.
Silk screened identification.
Supplied Data.
Data Format.
ODB++
RS-275/Excellon Data.

and here is a basic list of related specs:
The applicable issues of these documents shall be that or those in effect by the responsible industry association on the date of the procurement document.
IPC – Association connecting electronics industries
IPC-6011 Generic Performance Specification for Printed Boards
IPC-6012 Qualification and Performance Specification for Rigid Printed Boards
IPC-4101 Specification for Base Material for Rigid and Multilayer Printed Boards
IPC-4552 Specification for Electroless Nickel/Immersion Gold (ENIG) Plating for Printed Boards
IPC-2221A Generic Standard on Printed Boards Design
IPC-7351 Generic Requirements for Surface Mount Design and Land Pattern Standard
IPC-SM-840D Qualification and Performance Specification of Permanent Solder Mask
IPC-A-610 Generic Standard on Printed Boards Design
IPC-4562 Metal Foil for Printed Wiring Applications
 
Last edited:

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top