Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

asynchronous fifo designing

Status
Not open for further replies.

karthik87

Junior Member level 1
Joined
Jan 22, 2011
Messages
15
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,390
Hi i am writing code for async fifo. I have two domains write n read,in write domain i have to check full flag n in read domain empty flag.....

I have started code with write domain...I have done bin to gray conversion for writeptr at writeclk.....is it required again to convert writeptr to binary n then check for empty flag in read domain????n is this conversion of writeptr from G2B has to be done during readclk and readen??

for checking full flag i have to compare wrptr(binary) with readptr in write clock domain....but i have readptr in gray...,so is this rdptr has to be converted to binary???if so i have to do this conversion at wrclk or rdclk????

pl reply urgently

thanks in advance
 

when u write data in to fifo , why dont u update the empty flag to false and update fifo counter by 1 if it hits maximum update the check full flag, when u read decrease the fifo counter and if it reaches zero raise empty flag.

u can convert the data from bin to gray when writing and reverse when u read
 

Hi,

normally you have a write_ptr in the write clock domain
as you stated this write pointer is converted to a gray counter value (in the write clock domain) (write_ptr_gray_write_clock)

This gray counter value is synchronized to the read clock domain (write_ptr_gray_read_clock) (with a 2 flipflop stage).

In the read clock domain you have a read pointer. This pointer is also converted to gray in the read clock domain ( read_ptr_gray_read_clock ).

Checking for the empty flag is done in the read clock domain.
The fifo is empty when
write_ptr_gray_read_clock == next read_ptr_gray_read_clock
during a read access

for the full flag the same thing is done in the write clock domain
The fifo is full when
next write_ptr_gray_write_clock == read_ptr_gray_write_clock
during a write access

You need to carefully think about it, because write_ptr == read_ptr is the case when the fifo is empty and when the fifo is full.
So you need also to take the flags into account for your state machines.

If there is no need for the fifo ram to be addressed in a linear fashion, you can avoid to count in binary and converting to gray.
Just count in gray.

regards
 

  • Like
Reactions: qieda

    qieda

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top