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16 QAM designusing xilinx system generator and simulink

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hemalatha.b.k

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Hi friends,

I am involved with Software defined radio project. In my project i am using 16 QAM modulation technique. In 16 QAM modulator 2 to 4 level conveter is used.
My question is how to design 2 to 4 level conver and serial to paraller conver.
Im using xilinx system generator in SIMULINK on MATLAB for modeling.

I couldn't find much help in internet searches. Some experts here could help me....Thank you
 

hello :)

am designing a 16 QAM modulator in both Simulink and sys gen as well

in Simulink u can use a look up table LUT for the 2-to-4 level conversion, matlab help will provide u all the details u need
and in the s2p conversion u can use a demux or the transpose block, or u can write ur own code

the issues i encountered were in sys gen, i decided to search for a VHDL code and use a black box but i really rather not, so please if u solved ur problem i'll really appreciate it if u can send me the mdl file :) my email amy39_17@hotmail.com

i hope that was helpful
 

hi,

Thanks for guidence.
I should also design in sys gen. but i dont know verilog .
I am searching on net whether we can design using available basic Xilinx Block set. if you get to know how to solve this prob plz help me out.
Thank you
 

glad i was helpful :)

i only studied VHDL before and i don't know about verilog or if there are any similarities between them

i'll be more than glad to send u some .mdl files of what we reached so far in simulink if u like

but sys gen is still a dead end for me :(
 

Hello,

Even i am facing difficulty in verilog coding. But i'm trying taking individual component like S2p converter then filter then muiltiplier and integrate it at last.
Can you share your M-file and .mdl file of ur proj.
 
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