how to simulate the noise of pfd+cp+lpf using hspicerf ?

yxh12321 · Feb 12, 2011

hi all:
.hb tone=10meg nharms=127
.options hbtraninit=1u tramforhb=1 hbmethod=2
.hbnoise v(out) vref dec 11 10 10meg [0,1]
.probe hb v(out)
.probe hbnoise onoise

1, I wanna sim the noise of pfd & cp & lpf & iref , this is a part of the netlist that I learnt from a paper.but the wave outputed is totally not like that showed in the paper. the x-axis is almost the same as the paper,both are offset frequency(Hz). but the y-axis are very diffierent , the unit of mine is V^2/Hz.however it is dBc/Hz on the paper.I am very confused about this . please help me , I am a new guy to study PLL .

2, the referece frequency is 6MHz, 0 phase difference, but I set tone=10MHz, am I right ?

3, nharms=127 why it is 127? how to set this parameter?

I am a new fish in this area, please help me~~~

pancho_hideboo · Feb 19, 2011

yxh12321 said:
I am frankly waiting for your help~~~

Do you think there is anyone who can answer with your poor descriptions.
This is also very true for The Designer's Guide Community Forum - needs your comment: how to take power supply noise into account for PLL design

Show us the followings.

yxh12321 said:
this is a part of the netlist that I learnt from a paper.
but the wave outputed is totally not like that showed in the paper.

- Paper you refered in the above.
- Architecture of your PLL Synthesizer. Integer-N or Fractional-N ?
- Output Frequency of PLL Synthesizer
- Comparison Frequency and Reference Frequency

See "hspicerf/shallowchip/PLL_PART_I" and "hspicerf/shallowchip/PLL_PART_II".

.PHASENOISE
Performs phase noise analysis on autonomous (oscillator) circuits in HSPICE RF.
Syntax
.PHASENOISE output frequency_sweep [method=0|1|2]
+ [carrierindex=int] [listfreq=(frequencies|none|all)]
+ [listcount=val] [listfloor=val] [listsources=on|off]
+ [spurious=0|1]

yxh12321 · Feb 22, 2011

pancho_hideboo said:
Do you think there is anyone who can answer with your poor descriptions.
This is also very true for The Designer's Guide Community Forum - needs your comment: how to take power supply noise into account for PLL design

Show us the followings.

- Paper you refered in the above.
- Architecture of your PLL Synthesizer. Integer-N or Fractional-N ?
- Output Frequency of PLL Synthesizer
- Comparison Frequency and Reference Frequency

See "hspicerf/shallowchip/PLL_PART_I" and "hspicerf/shallowchip/PLL_PART_II".

hi pancho_hideboo,
thank you for your advise.

1. I don't know how to upload the paper as others.I'm sorry.
But its name is "Predicting PLL Phase Noise & Jitter with HspiceRF"

2.My PLL is Integer-N

3.output of VCO =108MHz

4.Reference Frequency = 6MHz , and I don't quite know the meaning of "Comparison Frequency".

Please give me more help.

pancho_hideboo · Feb 22, 2011

yxh12321 said:
2, the referece frequency is 6MHz, 0 phase difference, but I set tone=10MHz, am I right ?

Wrong.
It has to be 6MHz.

yxh12321 said:
3, nharms=127 why it is 127? how to set this parameter?

108MHz=18*6MHz.
If your circuit requires up to 10th harmonics of 108MHz, you have to set nhharms=10*18=180.

yxh12321 said:
but the y-axis are very diffierent , the unit of mine is V^2/Hz.however it is dBc/Hz on the paper.

Use ".phasenoise" instead of ".hbnoise".

And you had better use ".sn (Shooting-Newton)" instead of ".hb (Harmonic Balance)" like following.

.sn tone=6meg nharms=180 trinit=1u oscnode=out
.phasenoise v(out) DEC 11 10 10meg method=1 listfloor=-300

yxh12321 · Feb 23, 2011

hi pancho_hideboo,
thank you very much for your reply.I will try what you said today.

may I ask another question.
I have read some papers about this. Some of them suggest PFD+CP+vdc(or iprobe),to get the current noise . Some of them suggest PFD+CP+LPF ,to get the phase noise directly. I am confused about this. Could you tell me which way is correct?

And thank you again!!

pancho_hideboo · Feb 23, 2011

yxh12321 said:
Some of them suggest PFD+CP+vdc(or iprobe), to get the current noise.
Some of them suggest PFD+CP+LP, to get the phase noise directly.
I am confused about this. Could you tell me which way is correct?

Do you understand an working mechanism of your PLL synthesizer ?

As far as in band noise, they are same, if LP never adds extra noise.
However they both don't provide noise as dBc/Hz directly.
They both provide noise as dBrad/Hz.

See The Designer's Guide Community Forum - how to measure phase noise of PLL? and related links.

yxh12321 · Feb 24, 2011

hi pancho_hideboo,
thank you very much for keep helping me .
I will study it seriously.

yxh12321 · Feb 24, 2011

hi pancho_hideboo,
I am very appreciate that you helped me a lot.
And I also want to learn how to use spectreRF to simulate the noise of every part of a PLL.
I followed some paper to use PSS+Pnoise,but the result was quite different an unreasonable. Could you please give me some detailed paper or some links about this?

pancho_hideboo · Feb 24, 2011

yxh12321 said:
1, I wanna sim the noise of pfd & cp & lpf & iref , this is a part of the netlist that I learnt from a paper.
but the wave outputed is totally not like that showed in the paper.

yxh12321 said:
And I also want to learn how to use spectreRF to simulate the noise of every part of a PLL.
I followed some paper to use PSS+Pnoise, but the result was quite different an unreasonable.

How are they different ?

I don't think your problem can be resolved even if you use Cadence Spectre instead of Synopsys HSPICE.
Methodolgies of simulation are completely same even if you use any vendor's simulator.

I think you need a study of basic theory of PLL before EDA-Tool-Play.

yxh12321 said:
Could you please give me some detailed paper or some links about this?

The Designer's Guide Community - Analysis

yxh12321 · Feb 28, 2011

hi pancho_hideboo,
thank you for your reply.
I do need a study of basic theroy of pll.

yxh12321 · Mar 7, 2011

hi pancho_hideboo,
My teacher let me simulate the noise of a multiple modulus divider which is programmable and its divide ratio is from 4 to 27. But I encountered convergency issues when I do PSS and PNoise. Could you please help me ?
Let me describe my problem more detailed.
I set the divider ratio to 4 . Input frequency is 200MHz.
PSS: beat frequency=50MHz; number of harmonics=30; moderate; tstab=300n;
PNoise: sweeptype=relative; relative harmonic=1; frequency sweep rang= 10K ~100M; maximum sideband=10;
output=voltage (node: out blank) ; input source=none; noise type=source.

Is it because the structure is too complex? 　I set up the same parameters when I simulate a simple divider-4, and it converged successfully . I change the beat frequency to 25MHz and simulate a simple divider-8, it is also OK．
So,could you tell me why ? And give me some advice

thank you!

pancho_hideboo · Mar 7, 2011

yxh12321 said:
when I do PSS and PNoise.

There are many simulators which have analyses called as PSS, PAC and Pnoise.
Describe correct vendor's name, tool's name and its version which you use as tool or simulator.

yxh12321 said:
PSS: beat frequency=50MHz; number of harmonics=30; moderate; tstab=300n;

Don't use a term of "beat", if you mean PSS of Cadence Spectre.

See "spectre -h pss", if you mean PSS of Cadence Spectre.
There is no "beat" in analysis statement for PSS of Cadence Spectre.
"beat frequency" of PSS setting UI is not beat frequency. It is a "fundamental frequency" not beat frequency.
The Designer's Guide Community Forum - Beat frequency for a dual modulus divider

yxh12321 said:
Is it because the structure is too complex?

(1) What analysis engine do you use as PSS, Shooting-Newton or Harmonic-Balance ?
(2) Show me log file regarding convergence failure.
(3) Confirm operation of your divider using Transient Analysis.
(4) Confirm fundamental period of your divider.
The Designer's Guide Community Forum - Beat frequency for a dual modulus divider

yxh12321 · Mar 8, 2011

hi pancho_hideboo,
thank you very much for your help.
(1) its PSS of Cadence Spectre mimsim611
(2) I have read your posts and "spectre -h pss",now I know it's fundamental freq.
(3)

What analysis engine do you use as PSS, Shooting-Newton or Harmonic-Balance ?

I use Shooting-Newton
(4)

Show me log file regarding convergence failure.

I got 3 pictures of the log,you can see it below

====

(5)

Confirm operation of your divider using Transient Analysis.

I don't quite understand this. When I run PSS , it automaticlly does Transient Analysis first, doesn't it?
(6)

Confirm fundamental period of your divider.

I set the fundamental frequency = 50M , isn't it the same as fundamental period = 20n ?

thank you in advance

yxh12321 · Mar 9, 2011

hi pancho_hideboo,

You had better use newer Spectre, at least MMSIM6.2

I'm afraid I can't get another Spectre here . Is this the key?
I did what you said, but it still didn't converge. I will paste some pictures.

====

Activate "saveinit" in PSS.
Then show me time waveforms of input and output of your divider during initial transient.

this is it

thank you in advance.

yxh12321 · Mar 10, 2011

hi pancho_hideboo,

Try to set errpreset=liberal, tstab=600n

Click to expand...

I tried this , but I doesn't work. I paste the structre and the netlist below

========== Conv norm is not 110e+03 any longer.

========== This is the structre.

thank you very much in advance.

yxh12321 · Mar 10, 2011

hi pancho_hideboo,

Don't specify "method" and "tstabmethod" in PSS setting.

I tried what you said, but it still didn't work.
It had run for a long time,and the "Conv norm" is always 79.9e+03 .

thank you

pancho_hideboo · Mar 10, 2011

yxh12321 said:
I tried what you said, but it still didn't work.
It had run for a long time,and the "Conv norm" is always 79.9e+03.

It is very strange.

When shooting-newton-pss fails in convergence, generally "Conv norm" goes up and down until maximum pss iteration which is specified by "maxperiod=200".

How does your "Conv Norm" behave ?

In your scahematic of divider, I can see five 1/2-dividers.
I think you have to specify pss like following

pss pss fund=200M/32 harmsvec=[32 16 8 4 2 1 0] maxacfreq=10*200M
+ maxperiods=200 maxiters=15
+ tstab=800n // 5*fund_period=5*(32/200MHz)
+ outputtype=all
+ errpreset=moderate annotate=status

pnoise ( fout 0 ) pnoise sweeptype=relative relharmnum=8
+ start=10k stop=100M dec=11 maxsideband=10*32 annotate=status

If you can provide full netlist including device model, I can resimulate.

yxh12321 · Mar 11, 2011

hi pancho_hideboo,
Thank you very much.

How does your "Conv Norm" behave ?

Today I simulated again refer to what you said.It also didn't converge .
The "Conv Norm" is always 110e+03, just as I pasted before.
Yestoday,I wanted to see the final result.So I didn't kill the PSS. At last,200 iterations , the "Conv Norm" was still 79.9e+03 . I found if errpreset=moderate ,"Conv Norm"=110e+03;
if errpreset=liberal ,"Conv Norm"=79.9e+03.

pss pss fund=200M/32 harmsvec=[32 16 8 4 2 1 0] maxacfreq=10*200M

By the way,I didn't find "harmsvec",so I ignored this parameter.

If you can provide full netlist including device model, I can resimulate.

I am very sorry,I have no right to provide the full netlist recently.
I paste the inside schematic of the div_by2_by3

By the way, I used dongbu013 , and vddd=1.5V

pancho_hideboo · Mar 11, 2011

yxh12321 said:
By the way,I didn't find "harmsvec",so I ignored this parameter.

You can set it even from GUI.

If you can't, set "harms=32" instead, although it is a waste of computer resources.

yxh12321 said:
I paste the inside schematic of the div_by2_by3

It seems that a fundamental frequency of your circuit is not 200M/32.
Unless you provide full schematic or netlist, I can't determine true fundamental frequency.

Confirm time period of all nodes in your circuit very very carefully.
If you can understand a working mechanism of your frequency divider correctly, you can easiliy determine corrrect fundamental frequency.

yxh12321 · Mar 11, 2011

hi pancho_hideboo,
Thank you for keeping helping me .
Thank you very much.

It seems that a fundamental frequency of your circuit is not 200M/32.

I have read yours and Ken's pasts,and I know beatfrequency is fundamental frequency in spectre PSS.
But fundamental frequency is output frequency,isn't it?

Unless you provide full schematic or netlist, I can't determine true fundamental frequency.

I pasted the full schematic above.And this is a classical structre on the IEEE.
I wish you can resimulate it if you have spare time. And if you have to get the netlist, I will try to apply for an authority to paste the netlist here.
In these days, I will also keep trying some fundamental frequency.
I also asked for help in another forum,but nobody solve this problem,and somebody has the same issue as mine.So please help me again.
Thank you

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