help me plzz to decide a topic for my project

i need to do mini project in backend so can any one help in takiing the topic i need reply as soon as possible . i can do in matlab,verilog and spice so plz help meeeeee:sad: i have done 1st sem project in verilog so now looking for spice or matlab

Hi Krishna,

One thing.. if you wanted to so something in SPICE /Verilog , then its very difficult to do anything in the backend. Because for backend you need EDA tools and those are not avaliable so easily. So I will prefer that you do ur project in the frontend. A lot of projects are there.. and I can help u with respect to that. First decide what exactly you wnted to do.
For backend , just check , if tools are avaliable in you college lab. Another thing I wanted to know before suggesting any topic , are you doing masters or Graducation?

Hey Krishna,

So you are a MS VLSI CAD student from manipal university.

I think you should start working on some cell characterizations..experiment with different logic styles. This will give you a initial start for working on more complex designs.

One more thing...you were saying you have a done a miniproject using verilog so you dont want to do it again in this semester. I think whatever you have done in the last sem is till a particular step in the design flow..say synthesis. So you have done RTL coding, verification and hopefully synthesis. So why dont you take the same design and run it through the remaining steps in the design flow which will give you a complete understanding from RTL to Routing. I think Manipal University has synopsys tools for PnR also.

Of course its your choice....

Cheers