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How to generate sine wave with freq. 15kHz or 20kHz with only 48kHz clock?

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Dave_PL

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Hi,

Is it (if is then how) possible to generate sine wave with frequency lets say 15kHz and 20kHz having only CLK of 48kHz ? Im asking because I wanted to generate this type of a signal and send it through I2S to the AC97 codec on my board and connect it to PC and see signal and its spectrum in SpectraLAB (or any other program which has FFT option). I thought about having sine values in ROM and read data every CLK but when I want to generate 20kHz sine with CLK = 48kHz I need to read a little over 2 samples per period (Nyquist) am I right? If so how can I now which values should I choose. Or maybe there is another method. I would appreciate your help.

Regards,
Dave
 

Re: Sine wave generation

A codec should be able to reproduce 20 kHz with 48 kHz smapling rate, because it has a steep output filter. Analyzing the signal by FFT can't give more than the fundamental and won't be of much use, I think.

The ROM address would be generated by DDS (direct digital synthesis method),involving a NCO (numerical controlled oscillator) basically you have an accumulator of sufficient length and add a phase increment representing the intended frequency. The upper 12, 16, whatever accumulator bits go to the ROM.

Numerically-controlled oscillator - Wikipedia, the free encyclopedia
 
Re: Sine wave generation

There are many ways to generate a sine wave. I like to use an integrator to convert a square wave to a triangular wave, then follow that by a logarithmic wave shaper. You can also convert a square wave directly with a 2nd order S&K filter tuned to the fundamental frequency. As FvM suggests, it would be more interesting to see the spectrum of a square wave.
 

if you are using a FPGA then you can use a PLL to multiply the 48Khz clock by 5 to 240Mhz. to get a 20Khz clock divide the 240MHz clock by 12 and to get the 15Khz clock divide it by 16.
 

Please pay attention to the difference between kHz and MHz. Not FPGA PLL works on kHz.
 

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