Implementing BPSK modulator in VHDL?

modulator in vhdl

Hello,
I am looking for a way to implement a simple BPSK modulator and demodulator in VHDL, but could not find any prewritten code to learn from on this topic.
I need some example to understand how modulation can be implemented in VHDL. If you can provide any help on this topic, that would be great.

Thank you in advance

bpsk vhdl

In the modulator, you need a pulse shaping filter. If your channel bandwidth is big enough, you can directly use an external low pass filter to do the pulse shaping. Then nothing much left in modulator.

In the demodulator, you need to do carrier recovery and symbol synchronizaiton. Depends on how your front end is designed, you may or may not need to implement them in VHDl.


regards

modulator bpsk

Implementing Digital BPSK modulator is simple. Just use 2 input EXOR gate. Feed the digital modulating signal to one input and at the other input feed the digital carrier, the frequency of which is always integral multiple of modulating signal. The output of EXOR is the BPSK modulated signal. Modulating signal's clock and digital carrier should have synchronization.

vhdl modulator

dll_embed said:

In the modulator, you need a pulse shaping filter. If your channel bandwidth is big enough, you can directly use an external low pass filter to do the pulse shaping. Then nothing much left in modulator.

In the demodulator, you need to do carrier recovery and symbol synchronizaiton. Depends on how your front end is designed, you may or may not need to implement them in VHDl.


regards

Click to expand...

My question is concerning the pulse shaping filter, could someone explain how I may implement an FIR filter in VHDL which is supposed to "shape" the digital bits into half sinusoidals ?! All I'm thinking of is that an FPGA which will carry this process is digital, i.e. only 1's or 0's can be taken from it, does that mean an FIR filter can't be done ?

My task is to simply implement an FIR filter with serial data input and result in a pulse shaped output, and what's confusing me is that I can't imagine how an FPGA can give this pulse shape since it only deals with digital bit streams, does that mean I need a DAC?

thanks everyone, salam.

bpsk modulator in vhdl

OK seems my previous questions were somewhat silly.
I've been doing some reading, my problem was due to my academic study, we always had the input to the FIR filters as delta functions, to be precise they were sampled analog inputs. While we always said that FIR filters are digital ones which may have caused me all the confusions.

Basically the FIR will have its inputs as digital bytes containing the values of the sampled analog data it is equivalent to, then the process of delaying and multiplying with weights will take place. The result will be applied to a DAC giving us the required pulse shaping we needed. The shaped pulses will then be applied to the RF modules that will add carriers and so on.

My question here is how can I determine the coefficients of the FIR if all I need is half sine shaped pulses ?
Is there any equations that one may get the coefficients from, or is there more to it ??

thanks all, salam for now