vjabagch
Member level 1
I am not sure how to connect two peripherals (SRAM controller and Wishbone to PLB Bridge) to each other in EDK. I have an SRAM controller that interfaces to user logic using wishbone signals and a Microblaze processor with a PLB bus.
How do I use the bus selection in EDK to identify that the SRAM controller wishbone interface will connect to the WB to PLB bridge?
I have no issues connecting the Wishbone SRAM controller to the off chip SRAM using the UCF file. Similarly I have no problem connecting the Bridge to the PLB bus. But I do have a difficulty connecting the SRAM controller Wishbone side to the bridge's Wishbone ports.
Please advise on how to select the pins to connect both custom ip cores "together".
Why am I doing all this? I want to read write to SRAM using a C code on the Microblaze processor on a Virtex 5 FPGA.
Thank you.
How do I use the bus selection in EDK to identify that the SRAM controller wishbone interface will connect to the WB to PLB bridge?
I have no issues connecting the Wishbone SRAM controller to the off chip SRAM using the UCF file. Similarly I have no problem connecting the Bridge to the PLB bus. But I do have a difficulty connecting the SRAM controller Wishbone side to the bridge's Wishbone ports.
Please advise on how to select the pins to connect both custom ip cores "together".
Why am I doing all this? I want to read write to SRAM using a C code on the Microblaze processor on a Virtex 5 FPGA.
Thank you.
