Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

input impedance of an LDO

Status
Not open for further replies.

allennlowaton

Full Member level 5
Joined
Oct 5, 2009
Messages
247
Helped
3
Reputation
6
Reaction score
3
Trophy points
1,298
Location
Taiwan
Activity points
3,062
hello guys..
My first stage is a charge pump then followed by an LDO.
I'm having trouble on what value of output resistance to be used for the charge pump simulation before LDO is connected.
Any suggested approximation for the input impedance of the LDO?

Thank you......
 

Operating in dropout or close to it, impedance will be
Vdrop/Iout more or less. If it's a PMOS LDO then you
are pushing on the source of a cascode which is low
impedance. So your impedance depends on the pump
and the load. You might want to work on the LDO first
as well as representing load-cases "generically".

You may have to do a few corners (low Vdrop, low current;
low Vdrop, max current; high Vdrop, low current; ....) to
capture the likely variation in stability and pump-up
behavior. Perhaps permuted with whether you are trying
to pump while on, vs enable after pumped exceeds
undervoltage. I've done some charge pumps that pump
less effectively when voltages are low (sync rect style)
and really take off after per-stage charge (voltage) gets
past VT. Swinging from subthreshold to well driven, as
it were.
 
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top