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[SOLVED] How to declare two bit input in UCF of verilog

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moonnightingale

moonnightingale

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This is my code


module alu2bit(aluout,result,zero,one,two,three,four,five,six,seven,eight,nine,a,b,select);
output [3:0] aluout,result; // the result
output [3:0] zero,one,two,three,four,five,six,seven,eight,nine;
input [1:0] a,b; // input a and b
input [1:0] select;
reg [3:0] aluout,result;
reg [3:0] zero,one,two,three,four,five,six,seven,eight,nine;

always@(a or b)
begin
case (select)
2'b00:aluout=a+b; // For addition of two bits
2'b01:aluout=a-b; // For addition of two bits
2'b10:aluout=a*b; // For multiplication of two bits
endcase
if (aluout==4'd0) result=zero;
else if (aluout==4'd1) result=one;
else if (aluout==4'd2) result=two;
else if (aluout==4'd3) result=three;
else if (aluout==4'd4) result=four;
else if (aluout==4'd5) result=five;
else if (aluout==4'd6) result=six;
else if (aluout==4'd7) result=seven;
else if (aluout==4'd8) result=eight;
else if (aluout==4'd9) result=nine;
else result=zero;
end
endmodule


I want my LEDs to glow as per my result. how can i tell UCF about my two bit input data a and b

U can also give comments to refine my code
 

What documentation regarding UCF files for xilinx ise have you read so far, and what did you not understand? I noticed the other questions as well, but they seem pretty elementary in the rtfm sense...

Also, the NETs in your UCF file, give them names like LED0 for the output that attaches to a led, not something like out_a.

Then in your module you have LED0 as a module output, and you can do something like "assign LED0 = out_a;" to attach your internal wire "out_a" to the LED0 net that you defined in the UCF.

As for the "how do I do multiple leds with the one output" ...

assign LED0 = out_c;
assign LED1 = out_d;

like that...

Good luck!
 

I am unable to make bit file from above stated code.
my error message is

ERROR:ConstraintSystem:59 - Constraint <SLEW = SLOW |> [alu2bit.ucf(18)]: NET
"eight" not found. Please verify that:
1. The specified design element actually exists in the original design.
2. The specified object is spelled correctly in the constraint source file.

This error is from one to eight.

my UCF file is

NET "a[0]" LOC = "L13" | IOSTANDARD = LVTTL | PULLUP ; //for a input
NET "a[1]" LOC = "L14" | IOSTANDARD = LVTTL | PULLUP ; //for a input

NET "b[0]" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN ; // for b input
NET "b[1]" LOC = "D18" | IOSTANDARD = LVTTL | PULLDOWN ; // for b input

NET "select[0]" LOC = "H18" | IOSTANDARD = LVTTL | PULLUP ; //for a input
NET "select[1]" LOC = "N17" | IOSTANDARD = LVTTL | PULLUP ; //for a input


NET "one" LOC = "F12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "two" LOC = "E12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "three" LOC = "E11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "four" LOC = "F11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "five" LOC = "C11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "six" LOC = "D11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "seven" LOC = "E9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "eight" LOC = "F9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;

Plz help me.
I want my eight LEDs to glow with eight different math operation result
 

for one thing ...

Code: 
module alu2bit(aluout,result,zero,one,two,three,four,five 
,six,seven,eight,nine,a,b,select);


I don't see all the in/outputs from that module in your .ucf file (like aluout)...
 

but this is not the main problem.
Problem is some where If else statement portion

kindly help me
 

"Problem is some where If else statement portion"

so what do you think it might be?
 

Sir kindly see the error message.

I just want to tell the kit that if result is one, LED1 should glow
if the result of ALU is 2, then LED 2 should glow.
Something is wrong in declaring one two ..... till eight .
I am using one two ...... till eight just to tell the kit

Error is

ERROR:ConstraintSystem:59 - Constraint <NET "one" LOC = "F12" |>
[alu2bit.ucf(11)]: NET "one" not found. Please verify that:
1. The specified design element actually exists in the original design.
2. The specified object is spelled correctly in the constraint source file.

This error continues till eight
 

I only use VHDL but one thing i see is that you declare one,two...eight as 4 bits length for each one and then you try to assign these 4 bits to a single pin of the chip
NET "one" LOC = "F12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "two" LOC = "E12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "three" LOC = "E11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "four" LOC = "F11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "five" LOC = "C11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "six" LOC = "D11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "seven" LOC = "E9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "eight" LOC = "F9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
Click to expand...

Alex
 

So you think it is not worth the effort to fix the ucf file? I will give you one hint .... ISE error messages are about as helpful as C compiler error messages were 20 years ago. You get one error message, which you should interpret as "20 steps ago something went wrong". I noticed with ISE something similar. So if you /know/ something is wrong with the ucf, fix it! Don't say "oh it is something else", because 1) you are right ... it is something else AS WELL, and 2) aluout etc are missing ... so xilinx ise will bomb out on that as well, so fix that first.

also... I am not certain of the syntax of:

Code: 
NET "a[0]" LOC = "L13" | IOSTANDARD = LVTTL | PULLUP ; //for a input
NET "a[1]" LOC = "L14" | IOSTANDARD = LVTTL | PULLUP ; //for a input

I always use something like:

Code: 
NET "a<0>" LOC = "L13" | IOSTANDARD = LVTTL | PULLUP ; //for a input
NET "a<1>" LOC = "L14" | IOSTANDARD = LVTTL | PULLUP ; //for a input

for that. I.e < instead of [. Again, I am not sure if the first one is wrong (and too lazy to look it up), but I do know for sure that the 2nd syntax is correct.

And I say again, in my experience when the ucf was not 100% tip top correct, xilinx ise would give me all sorts of intriguing error messages. So the hint would be to make sure the .ucf is 100% correct (which currently it is not).
 

i have declared them as single bit but same problem exists
 

alexan_e said:
I only use VHDL but one thing i see is that you declare one,two...eight as 4 bits length for each one and then you try to assign these 4 bits to a single pin of the chip


Alex
Click to expand...

Indeed. Which is why I suggest he tries to correct the .ucf to what he thinks it should be doing...
 

mrflibble said:
So you think it is not worth the effort to fix the ucf file? I will give you one hint .... ISE error messages are about as helpful as C compiler error messages were 20 years ago. You get one error message, which you should interpret as "20 steps ago something went wrong". I noticed with ISE something similar. So if you /know/ something is wrong with the ucf, fix it! Don't say "oh it is something else", because 1) you are right ... it is something else AS WELL, and 2) aluout etc are missing ... so xilinx ise will bomb out on that as well, so fix that first.

also... I am not certain of the syntax of:

Code: 
NET "a[0]" LOC = "L13" | IOSTANDARD = LVTTL | PULLUP ; //for a input
NET "a[1]" LOC = "L14" | IOSTANDARD = LVTTL | PULLUP ; //for a input

I always use something like:

Code: 
NET "a<0>" LOC = "L13" | IOSTANDARD = LVTTL | PULLUP ; //for a input
NET "a<1>" LOC = "L14" | IOSTANDARD = LVTTL | PULLUP ; //for a input

for that. I.e < instead of [. Again, I am not sure if the first one is wrong (and too lazy to look it up), but I do know for sure that the 2nd syntax is correct.

And I say again, in my experience when the ucf was not 100% tip top correct, xilinx ise would give me all sorts of intriguing error messages. So the hint would be to make sure the .ucf is 100% correct (which currently it is not).
Click to expand...

sir it will be great if u tell me solution as i am working for 2 hours but could not solve it
 

So if you remove the
NET "one" LOC = "F12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "two" LOC = "E12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "three" LOC = "E11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "four" LOC = "F11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "five" LOC = "C11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "six" LOC = "D11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "seven" LOC = "E9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "eight" LOC = "F9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
Click to expand...

from the ucf (just for testing), you still can't compile?

Alex
 

Another thought ... have you tried something simpler, like I don't know, a boring register with a slow 4 bit up counter, and attach that to 4 leds? Because you will run into the same sort of things, only less distractions shall we say.

---------- Post added at 17:16 ---------- Previous post was at 17:11 ----------

"the solution"? You have not specified "the problem" in sufficient detail. I know the concept of "it does not work after 34807234 zillion hours, and this frustrates me", but it's kind of hard to fix something of which we only have a sketchy description at best.
 

Sir my problem is that
" i want to have multiplication operation on a and b which are two bits each.
I want to choose the select operation of + - and X by switches of kit

then if the result is 1, LED 1 should glow
if result is 2 other LED should glow

and so on.
 

Understood. So what is your current new and improved .ucf file then?
 

Just thought I'd point out that square brackets in the UCF files are also fully valid. That's all I've ever used.

r.b.
 
Sir i have not changed UCF file
b/c i cannt see any problem in it
i also consulted Spatran manual
 

moonnightingale said:
Sir i have not changed UCF file
b/c i cannt see any problem in it
i also consulted Spatran manual
Click to expand...

What's the use of continuing with a known-to-be-insuffucient .ucf file? It does not contain all the input/outputs (aluout for example).

And as alexan_e pointed out, there is a hint in the fact that you declare "zero" ... "nine" as 4 bit registers.

Code: 
reg [3:0] zero,one,two,three,four,five,six,seven,eight,nine;

Yet, in the ucf you only declare them as 1-bit outputs.

So which variety do you intend to use? Do you mean "one" "two" etc .. to be 4 -bit registers? Or only 1 bit registers? I can totally rewrite it for you, but that would hardly be a learning experience. That, and I am a lazy person, so you do the work. ;-)

seriously though, in your design, do you intend the "one" "two" ... "nine" to be "1 bit things" or "4 bit things"? That is somewhat key to "what the hell am I trying to do anyway?"...
 

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