ray.deng
Newbie level 6
Hi everyone, I was trying to simulate the settling time of a D/A converter in cadence. Because I'm using a DAC from the AHDL library and it's an idea one, therefore the simulation result doesn't contain a settling period. I'm thinking to use a RC circuit to simulate that case but I'm not sure how I should do it so that there is a settling behavior that I can look at. Can anybody tell me how to create a simple RC circuit to simulate that? I just want to look at the typical settling time behavior, that is small delay, slewing and ringing. Thanks!