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ldv+ic5.0 use of cadence tool in IC simulation

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mickywang

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hello everyone:
I have a issue:there is a program edited with verilog and another program edited with verilogA ,I want simulate them together with ldv+ic5.o of cadence tool,but I don't how to operate it.for simulating
the program edited with veriloga,I finish it by using the command "ncveriog +ncams +ncanalogcontrol+sch.scs" successfully.
but I don't know what to do for mixed signal with verilog and veriloga files with ldv +ic5.0 of cadence tool.
I hope everyone to help me,tell me specific operating steps.thanks
a lot.
my email:mickywang@e2-solutions.com.tw or longtshsh@sohu.com
or longtshsh@yahoo.com.cn

bestregards
mickywang
 

Hi Mickywang,
Long ago, I have run the simulation about mixed signal. I remember that the most important thing is to generate a "config" part, which can combine the digital part and analog part. Detailed information can be found in the manual.
Good Luck!
 

hello :
thank you ,can you tell me which manual you said? is it <<Cadence AMS Simulator User Guide>>? after reading the manual,I don't find how to run mixed signal. here is my search web where there is operation steps how to run mixed signal include verilog and veriloga language files.

**broken link removed**

but I do not run successfully according to the steps on the web.
I do not know reasons.can you help me?

best reguards
micky
 

Hello, mickywang

Could you advise some mateials about RFIC?Please
 

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