alexdesigner
Newbie level 4
Hi again! There are some topics I'd like to discuss with you all, relating to the DVCO descibed in the paper I've attached. First i'll review some issues that might help achieving a better understanding
Now finally the question. Do anyone of you know why in the circuit described by Skvor
**broken link removed**
1) the feedback line has a larger width? Is it perhaps for having a small impedance path?
2) the line widths are decreasing proceeding from the first to last stage? Is it for forcing the signal to go "reverse"?
3) the last sections in the gate and in the drain line look so skewed? Has something to do with killing some unwanted oscillations?
Thank you so much!!
- 1 The "periodically loaded transmission line" is used as an analythical framework in distribuited amplifier theory. In fact, in its essence the distributed tunable oscillator comes from a distributed amplifier in which a feedback path is created, and frequency variation is attained by varying in some way the bias point of two active devices at a time.
- 2 For describing the input / output relationship analytically in a distributed amplifier one makes use of linear models (small signal) models for active devices, which are modeled as two port networks. The input port of a common source HJFET (neglecting the losses) and the reverse feedback (unilateral approximation) could be seen as an equivalent LC series circuit being C the "stray" capacity between gate and source (Cgs) and L the parasitic inductance at the gate Lg (actually the order of the circuit to take into account more details could be higher than 2, it is just an approximation!!). Same story looking into the output port, but this time we have different paramenters, Ld (drain parasitic inductance) and C= Cds (stray capacitance between drain and source) and of course a VCCS (voltage-controlled-current source) modeling the transconductance gain.
- 3 To obtain a distributed amplifier, we arrange the active devices in the following manner. Consider the signal generator coupled to the input line ( a microstrip line) properly terminated by a matched impedance. Now let's "tap" periodically the signal from the input line (gate line) by having the transistor gates connected to it, periodically in space (mantaining the spacing between the stages constant), and the same applies to the drains in the ouput line. Provided the elctrical lenghts between stages is the same for the output and for the input line, this topology gives roughly N times the amplification factor of only one stage, BUT WITHOUT a decrease in the operating bandwith.
- 4 From the description above, it seems logical to think at distributed amplifier as two periodically loaded transmission lines, coupled via the transconductance of the active device.
In an oscillator, in particular the one descirbed in the paper above, we create a feedback path by removing one termination and connecting together drain and gate line.
- 5 In an oscillator, in particular the one descirbed in the paper above, we create a feedback path by removing one termination and connecting together drain and gate line. To ensure proper operation, the line impedance should be matched "everywhere" with the load impedance (as matched as possible, to prevent the circuit from having erratic behavior). This could be accomplished by placing addtional "padding" capacitors to the ground and playing with the line widths between each stage.
Now finally the question. Do anyone of you know why in the circuit described by Skvor
**broken link removed**
1) the feedback line has a larger width? Is it perhaps for having a small impedance path?
2) the line widths are decreasing proceeding from the first to last stage? Is it for forcing the signal to go "reverse"?
3) the last sections in the gate and in the drain line look so skewed? Has something to do with killing some unwanted oscillations?
Thank you so much!!