eladla
Member level 4
Hi,
I`m working on a DRAM design and can`t find any reference design for a refresh counter.
Can anyone point me to a transistor / gate level implementation of a refresh counter?
Thank you!
I`m working on a DRAM design and can`t find any reference design for a refresh counter.
Can anyone point me to a transistor / gate level implementation of a refresh counter?
Thank you!