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Device isolation, see here.DS1988 said:Why exactly is STI done ?
Below pls. find an overview paper about STI induced stress:DS1988 said:What is the impact on the stress ?
Well is operated as a reverse n+p junction, so passes strongly temperature-dependent leakage current, whereas STI is a true isolator (SiO2, glass), hence much less leakage. Moreover: less capacitance, and better separation from parasitic devices.DS1988 said:Doesnt the well itself provide an isolation? Why do v need to further do an STI ?
The simple try etch method produces trenches whose lateral dimensions are about the same as its vertical depth. So in order not to waste too much lateral silicon width/area STI usually is kept shallow. For HV circuits, however, also DTI (deep ...) technology exists (s.a. the a.m. Wikipedia article).DS1988 said:Why is it shallow exactly ? Why cant it be deeper ?