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problems in sample and hold for ADC

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chaitu2k

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can anyone tell me or give me circuits to solve input dependent charge injection in sample and hold ...i have to use this for 16-bit adc so it should be very accurate...i have tried switched capacitor but no luck..i'am using 1.6u tech
 

Check chap.12 of this book

**broken link removed**
 

Use Miller Capacitor and bottom-plate sampling may achieve....

1.6u tech, what's your supply voltage?? How will you define your input range??
 

Exxuse me , WHat's structure do you use ? and the clock rate , input signal BW and Amplitude , It will
decide your s/H structure ...
 

suppy voltage is 3v ....input range is 0-2v... maximum frequency is 100hz...iam using a nmos pmos switch...and a capcitor after that and a voltage follower... the varaition of the capacitor charge is in millvolts in the hold phase...the maximum variation i can allow is 20u..
 

why dont try switch current ...
 

I don't think you can achieve 16 bit accuracy using so simple S/H with just a switch, capacitor and source follower. You must decide the S/H with SC circuit that using opamps. By the ways, what kind of 16-bit ADC you are designing? Sigma-Delta?
 

Use a switch and a capcitor can not realize 16bit accuraty,because when switch is on,the switch current will effect accuraty
 

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