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[SOLVED] Testing SRAM using Cadence Virtuoso

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somu.atluri

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Hi,

I have designed a SRAM using Cadence Virtuoso. I dont know how to test the memory. Basically I want to test each and every memory location, but I am not sure how to generate the input signals. I tested every cell using the stimuli option in the ADE, but when it came to system level, I cannot generate the signals I wanted using stimuli.

Also, I have the data bus which is bi-di. Is there a way to drive these pins for some time and then stop driving, because when I am reading the data, it appears on the same bus.

Please help me. I have access to Ultrasim, but never used it before. Will this tool be of any use?

Thanks in advance.
 

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