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About a layout issue with ibm pdk: Creating substrate node

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shahriar22nd

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Hi all,
I am learning the lvs of the mimcaps of ibm 9rf pdk with assura32-cadence ic613. I attached my schematic and the layout views, where I have only one lvs error- the substrate nodes of the schematic and the layout dont match. In fact, the substrate node of the layout is not being recognized. To create the substrate node, I placed a 'subc' in my layout with a 'gnd!' pin on it's 'M1' metal layer, but seems, it is not sufficient.

Moreover, as can be seen in the 'subc.jpg', there is a stamp connection error in the subc inspite of having the 'gnd!' pin on it.

Can anyone please write me how can I correct these errors?
Thank You.
Regards ...
 

Re: About a layout issue with ibm pdk: Creating substrate no

Your 'subc' 'gnd!' tap needs a metal connection to your 'gnd!' net!
 

Re: About a layout issue with ibm pdk: Creating substrate no

Thank you for your reply. The gnd! pin is on a metal layer, which is blue in color and is part of the pcell, though this metal not connected to anything else of the layout. It would create drc error if the gnd! pin were not on the correct metal layer.
May be, I need to know how the substrate terminal of the schematic is matched with that of the layout. Will it make any difference if I create a guard ring all around the mimcap consisting of the layers same as the subc?
 

Re: About a layout issue with ibm pdk: Creating substrate no

Sorry, you didn't understand my answer: You need to connect the metal layer of your gnd! pin by a full metal connection (wire routing) to your std cell gnd! or power supply ring (or pad, or wherever you get your gnd! from).

The 'subc' 'gnd!' tap is like an input, it has to be supplied by gnd!
 

Re: About a layout issue with ibm pdk: Creating substrate no

Ok, I understand now :) . But the problem is, I don't have any gnd! or power rail in my cell, because, as can be seen from the schematic view of my attached figure, I am doing the lvs of a single mimcap, with no other circuit elements in the cell. So, this is not a complete circuit actually, I am doing like this just to learn the lvs of the mimcap.
You mentioned that, the subc gnd! tap has to be supplied by gnd!, can you please elaborate this point? How can I make it 'supplied by gnd!' ? I created a gnd! pin with the idea that, the gnd node of the circuit is descending directly on that point of the layout- am I wrong with this idea?
Thank You for your suggestion :)
Regards ...
 

Re: About a layout issue with ibm pdk: Creating substrate no

shahriar22nd said:
... the subc gnd! tap has to be supplied by gnd!, can you please elaborate this point? How can I make it 'supplied by gnd!' ? I created a gnd! pin with the idea that, the gnd node of the circuit is descending directly on that point of the layout- am I wrong with this idea?
Click to expand...
I've never done that ... only created real circuits ;-). But I think you need to create another input pin named "gnd!" and connect it to your subc gnd! tap, both in schematic and layout.
 

Re: About a layout issue with ibm pdk: Creating substrate no

I shall try that soon. Thank You for your advice :) ...
 

Re: About a layout issue with ibm pdk: Creating substrate no

I created another substrate contact by layers with a gnd! pin on it and connected it to the previous subc- it worked. No modification was required in the schematic.
Thank you erikl for your advice :D .....
 

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