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Automatically defined modules in Xilinx 8.1

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rohit.dignity

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i have donloaded a verilog code in xilinx 8.1
i have encounter a module used for instance RAM128X1S_1 and ROM 256X1
this module is never defined or its code is not written anywhere is program
synthesis report says
Set user-defined property "INIT = 00000000000000000000000000000000" for instance

is this module is automatically defined in user define library?
 

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