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interface DAC in VHDL

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dpt30

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Hi,
I´m trying to interface a DAC converter in VHDL,in order to send a pulse, but i´m new in this type of design language.
so i need some help. I´m interested in the vhdl code if it would be possible. Thank you very much.
 

dpt30 said:
Hi,
I´m trying to interface a DAC converter in VHDL,in order to send a pulse, but i´m new in this type of design language.
so i need some help. I´m interested in the vhdl code if it would be possible. Thank you very much.

most DAC interface is SPI procotol, you can get a SPI core from OPENCORE website, and design a FSM to control it base on datasheet of dac.
 

dpt30 said:
Hi,
I´m trying to interface a DAC converter in VHDL,in order to send a pulse, but i´m new in this type of design language.
so i need some help. I´m interested in the vhdl code if it would be possible. Thank you very much.

Yes, we have done SAR (Successive Approx) like DAC in VHDL @ www.cvcblr.com Output ports can be real too!

Are you doing for modeling alone or for FPGA/ASIC?

TeamCVC
www.cvcblr.com/blog
 

cvc said:
dpt30 said:
Hi,
I´m trying to interface a DAC converter in VHDL,in order to send a pulse, but i´m new in this type of design language.
so i need some help. I´m interested in the vhdl code if it would be possible. Thank you very much.

Yes, we have done SAR (Successive Approx) like DAC in VHDL @ www.cvcblr.com Output ports can be real too!

Are you doing for modeling alone or for FPGA/ASIC?

TeamCVC
www.cvcblr.com/blog

i'm trying to send a pulse from a dac wich is connected to FPGA card
the reference of this dac is dac5672 form ti
 

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