IDS@VGS [uA/um@V] - Explanation

HI

I was reading a datasheet of a process when I came across these terms.

What does this signify for a MOS device?

Vt -0.85
IDS@VGS [uA/um@V] 155@12


1. What all information can we gather from this note?

2. How do we find the Kp = un*Cox from this note. At what W/L was this value deduced ?

3. What does uA/um@V imply here? or any other datasheet for that matter?
4. How does the W or L add up to the uA/um term ?

Thanks

Regards
Javed

Re: IDS(at)VGS [uA/um(at)V] - Explanation

g.s.javed said:

Vt -0.85
IDS(at)VGS [uA/um(at)V] 155(at)12

1. What all information can we gather from this note?

Click to expand...

• It's a HV pMOSFET (neg. Vt), operated in deep strong inversion (VGS=12V)
• With such few info, we can only speculate: Let's assume the given data is for a unit W/L ratio, i.e. W=1µm/L=1µm.
  
  

  g.s.javed said:

  2. How do we find the Kp = un*Cox from this note.

  Click to expand...

  I guess you mean µp!?
  
  With \[\ \ I_D_S\ =\ {1 \over 2}\ {\mu_p C_o_x \over n}\ {W \over L}\ {(V_G_S - V_T)}^2\ \ \] and an estimated strong inversion substrate factor of n=1.3,
  
  we can calculate \[{\ \mu_p C_o_x}\ =\ 3.24\ {\mu A \over V^2}\ \], which is more than 1 order of magnitude less than the respective pMOS
  (low field) transconductance factor of a 0.5µm process (≈ 40 µA/V²)

g.s.javed said:

At what W/L was this value deduced ?

Click to expand...

See assumption above.

g.s.javed said:

3. What does uA/um(at)V imply here?
4. How does the W or L add up to the uA/um term ?

Click to expand...

With the assumption above, I think this is clear now.