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AXI protocol help needed: Burst Size and Data Beat

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derif

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AXI protocol help needed

Hi,
1. With reference to AXI protocol, what does a data beat mean?
2. Burst Size is the number of Bytes in a beat, and can go upto 128 bytes. But the Data bus id only 32 bits wide (4-Bytes) so how can we transfer upto 128 bytes in a clock?
3. The Burst Length is actual number of data transfer in each burst.So does that mean that each data transfer takes place in a single clock cycle?

Every Data beat corresponds to a Data Transfer?
Multiple such data transfers (tasking place in a single clock) compose a burst?
How does the burst size co-relate to the Data bus size of 32 bits?

Thanks in appreciation.

Regards,
Derif
 

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